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Ionel

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Posts posted by Ionel

  1. There are recipes that have unmet dependencies/requirements which can lead to build problems. That is why not all recipes listed by `bitbake-layers show-recipes` are included in `project-spec/configs/rootfs_config` and need to be added via `project-spec/meta-user/conf/user-rootfsconfig`

    You can try adding package groups however in this situation you can not enable only one package in a package group.

  2. Hi @amd,

    If you just want to load a bitstream at boot time then a BOOT.BIN file containing fsbl and bitstream It is sufficient. you can use Xilinx bootgen tool for that. https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841976/Prepare+boot+image

    On SD card make sure to use FAT32 for first partition where BOOT.BIN is placed. https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18841655/Prepare+Boot+Medium

    Otherwise:
    1. Config files for PYNQ-Z1 board are added by patch files that can be found in https://github.com/Xilinx/PYNQ/tree/master/boards/Pynq-Z1/petalinux_bsp/meta-user/recipes-bsp/u-boot directory

    2. By applying the patches found in above directory.

    3. PYNQ build system uses petalinux internally which in turn requires Xilinx bootgen tool to generate the BOOT.BIN. ($ petalinux-package --boot --u-boot --fpga --fsbl --force)

    This file contains:
      a. fsbl;
      b. bitstream.bin;
      c. u-boot; (this u-boot contains a dtb)
    To boot the board up to second stage bootlader[ssbl](u-boot) you need BOOT.BIN and boot.scr|uEnv.txt (I am guessing it is optional for only this however u-boot needs a boot script|environment)
    The boot flow is as follows:
      A. zsbl searches for BOOT.BIN from which fsbl is loaded and run.
      B. After that fsbl will load the bitstream (found in BOOT.BIN) [Also this step can be performed by u-boot; command `fpga` is required for this]
          If it fails throws a short error message on UART(when you build the fsbl you can add the debug flag for more output.)
      C. In the end u-boot(found in BOOT.BIN) is loaded and started: u-boot prompt is available on UART.

     Using petailnux to build all this is way more easy but it depends on what you want to accomplish. If you still want to run the PYNQ OS|distribution in the end or you just want to use the board for stand alone application.

    So if you manually compile u-boot then make sure the fsbl is actually working if included in BOOT.bin

  3. XC7Z007S has only one core however in your device tree there is a node for a second core "cpu1". File pcw.dts enables nodes in reference zynq dtsi. Also make sure in your user-system.dtsi file there are no references to cpu1 node.

  4. Not sure what else is stated in the context of the quoted text but it looks like it is about a kernel module which can be included in petalinux by 1) configuring the kernel if the module is already included in the kernel sources. 2) patch and configure the kernel if not. 3) create a petalinux (yocto) recipe* for building the respective module out of tree then add it to the rootfs.

    *This recipe may already exist.

    It is possible other software are reqired for the final image to properly work with matlab.

  5. If you want to use version 2022.1 of petalinux/vivado you should know there is no bsp yet.

    However it is not that hard to create a basic design in vivado then create a petalinux project using zynq template acording to ug1144. Import your hardware design(.xsa file) using petalinux configure command.

    board specific configurations can be found for erliear versions of vivado/petalinux here: https://github.com/Digilent/Zybo-Z7-OS  you can use branch 20/Petalinux/next (petalinux 2020.1) as a reference.

     

  6. For a quick test you can use the sdcard. Place boot.bin, boot.scr and image.ub files on the sdcard and set bootmode to sdcard (not jtag).Then watch the boot process on serial port(UART over USB).

    boot.bin file can be generated using petalinux-package command. Check command output to be sure bitstream(.bit) file is included. "petalinux-package --boot --u-boot --fpga --fsbl" Check ug1144 for more details on petalinux.

    Regarding your test for booting using jtag/debug mode, did you reached step 10.4 bulet point 5 where you stop boot process by pressing Enter key on serial console(not the xsct console)?

    Quote

    I expect to see the u-boot menu on my console (zedboard USB console port), but don't.  I don't see anything ever on my console.


    As mention in instructions [10.4 bulet point4] on serial(usb) console you will receive a message to press a key to stop the boot process. By doing this you can reach u-boot CLI. At this point in xsct console you are instructed to suspend the boot process load image.ub file in RAM the resume the u-boot process and run a boot command to continue into next boot stage: loading linux kernel, device tree,rootfs etc..

     

    Q1: It shoud be ok for this test.

    Q2: It should just work no chages are needed.

    There are two parts at work: board UART over USB and your tool/software that conects to the UART(serial) [I personaly use picocom].There are some software that do not work as expected for example you can not send but you can receive. In short you should know your tool.

    Q3.a:It's ok.

    Q3.b: u-boot can be dependent on the bitstream (bitstream == hardware) . Bitstream should be loaded since it is part of the hardware(Step 8). Anything else at the apropiate time.

    Q4: No. bootm command is suficient to use image.ub you loaded in RAM at step 10.4. Bulet point 7.

  7. The user guide(UG1144) for petaliunx is a good starting point. And start with creating a new project. Also this may help https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/18842250/PetaLinux

    Or using this project for ZedBoard. However since you have a custom IP you may need to change various aspects of the project like the device tree and creating a custom kernel driver for your IP or a using uio for a driver in user-space.

  8. @Gumesh

    You may want to take a look at this project 

    Vivado 2020.1 project for Zybo-z7-20 https://github.com/Digilent/Zybo-Z7-HW/tree/20/Petalinux%2Fnext
    Petalinux 2020.1 project https://github.com/Digilent/Zybo-Z7-OS/tree/20/Petalinux%2Fnext
    Currently there is work done to port to Vivado and petaliunx 2021.1
    In newer version the xilinx linux kernel (5.4 for petalinux 2020.1 and 5.10 for petaliunx 2021.1) is used instead of digilent linux kernel.

  9. @shantaramj

    After issuing command:

    yavta -c14 -f YUYV -s "$width"x"$height" -F /dev/video0
    

    List content of your current directory (ls -l) :

    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000000.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000001.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000002.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000003.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000004.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000005.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000006.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000007.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000008.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000009.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000010.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000011.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000012.bin
    -rw-r--r--    1 root     root       4147200 Dec 16 12:57 frame-000013.bin
    

    documentation:

    Quote

    The functions above will create 14 image files in your current directory.

    Probably term `functions` is misleading it should be commands.

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