hamster Posted November 11, 2014 Share Posted November 11, 2014 If you want a bit of an FPGA challenge here is one for you. Everybody knows that addition is the most basic math function, and you can't do anything useful without it . Design and implement a Digital clock, but without using any addition The design has pretty simple specs: * Output is a 12 hour display (time shown as 1:00 through 12:59), on the seven segment display * Inputs are two push buttons, one to set the hour and the other to set the minute * On power-on the time resets to 12:00 * No addition to be used anywhere in the design - and implementing your own adders using boolean logic is cheating! * Time keeping has accuracy matching that of the system clock * You can't use any IP cores in the design Link to comment Share on other sites More sharing options...
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