Jump to content
  • 0

Variable packet data output using axi-uartlite (Ublox and Zedboard)


gcp

Question

Dear FPGA experts,

Good day!

We were trying to interface our ublox neo M8U gps into the pmod Zedboard using the UART connection. We successfully created the hardware design in vivado by using the axi_uartlite IP in routing the TxD and RxD pins of the gps to the PL  part  of the zedboard (spec. Pmod JB1) and export bitstream in SDk environment. Make some editing of the pre-built code example of axi-uartlite, then finally it runs successfully and we can evaluate the packet that coming out from the gps.

 

Upon checking of the packet results, we noticed that the packet data bytes received each clock time is variable in length and it has a maximum of 16 bytes data only. Our expected total data bytes in each time cycle should be 700 bytes. 

 

Our questions that needs an expert advice:

1. Is this a standard characteristic of axi-uartlite that the received data bytes in each cycle is less than 16 bytes?

2. We need to get our expected total data bytes in every cycle, is this possible? How can we do it in a code?

3. How to make our set-up more efficient in terms of time in parsing the data packets?

 

I will include our code and hardware design below for you to check.

 

Thanks and hoping to hear from the experts.

 

Best regards,

Glenn

 

/******************************************************************************
*
* Copyright (C) 2009 - 2014 Xilinx, Inc. All rights reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* Use of the Software is limited solely to applications:
* (a) running on a Xilinx device, or
* (b) that interact with a Xilinx device through a bus or interconnect.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
* XILINX BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
* OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
* Except as contained in this notice, the name of the Xilinx shall not be used
* in advertising or otherwise to promote the sale, use or other dealings in
* this Software without prior written authorization from Xilinx.
*
******************************************************************************/

/*
* helloworld.c: simple test application
*
* This application configures UART 16550 to baud rate 9600.
* PS7 UART (Zynq) is not initialized by this application, since
* bootrom/bsp configures it to baud rate 115200
*
* ------------------------------------------------
* | UART TYPE BAUD RATE |
* ------------------------------------------------
* uartns550 9600
* uartlite Configurable only in HW design
* ps7_uart 115200 (configured by bootrom/bsp)
*/

#include <stdio.h>
#include "platform.h"
#include "xil_printf.h"
#include "xstatus.h"
#include "ps7_init.h"
#include "xscugic.h"
#include "xparameters.h"
#include "xuartlite.h"
#include "xil_printf.h"

#define TEST_BUFFER_SIZE 700


u8 SendBuffer[TEST_BUFFER_SIZE]; /* Buffer for Transmitting Data */
u8 RecvBuffer[TEST_BUFFER_SIZE]; /* Buffer for Receiving Data */

XUartLite UartLite; /* Instance of the UartLite Device */

int UartLitePolledExample(u32 DeviceId)
{
int Status;

/*
* Initialize the UartLite driver so that it is ready to use.
*/
Status = XUartLite_Initialize(&UartLite, DeviceId);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}

/*
* Perform a self-test to ensure that the hardware was built correctly.
*/
Status = XUartLite_SelfTest(&UartLite);
if (Status != XST_SUCCESS) {
return XST_FAILURE;
}

 


return XST_SUCCESS;
}

 


int main()
{
int ReceivedCount = 0;
int i;


init_platform();

//enable the pl
ps7_post_config();
// xil_printf("status is %d\n\r",status1);

//enable uartlite
UartLitePolledExample(XPAR_UARTLITE_0_DEVICE_ID);
//xil_printf("status is %d\n\r",Status2);

xil_printf("Hello World, GCP!\n\r");

while(1) {

ReceivedCount = XUartLite_Recv(&UartLite,RecvBuffer,TEST_BUFFER_SIZE);

for(i=0; i<ReceivedCount; i++)
{
xil_printf("ReceivedCount[%d] = %x\n\r" ,i,RecvBuffer);
}
}

cleanup_platform();
return 0;
}

 

HardwareDesign.png

PacketResults.png

Link to comment
Share on other sites

1 answer to this question

Recommended Posts

Hi @gcp,

The buffer size is set at 16 bytes. It sounds like you need to service the buffer more frequently, perhaps this means using interrupts. Another option would be to create a custom uart IP which contains a sizable buffer. Making a custom uart IP is likely more than what you need to do. You might want to look at the 16550 IP core as well.

cheers,

Jon

Link to comment
Share on other sites

Archived

This topic is now archived and is closed to further replies.

×
×
  • Create New...