I have designed a filter using xilinx system generator blocks. I need hdl code for ASIC design of same filer so im using HDL coder which is need to pass HDL workflow advisor-test . In this test at 2.3 check block compatibility I got a error as "Abnormal exit: Undefined function or variable "checks". how to solve this problem please help any body...................
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cnun999
I have designed a filter using xilinx system generator blocks. I need hdl code for ASIC design of same filer so im using HDL coder which is need to pass HDL workflow advisor-test . In this test at 2.3 check block compatibility I got a error as "Abnormal exit: Undefined function or variable "checks". how to solve this problem please help any body...................
thanking you
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