chcollin Posted July 18, 2017 Share Posted July 18, 2017 Hi there ! As said in the title, i am both a recent Atlys owner and total noob at all those things ! To tell you more about me : I am a 40 yo french guy with no skill at all in electronics, yet i can program in C language. Why would I play with an Atlys then ? For some personal hobby project, i need to real-time rotate a VGA video stream, 640x480@60hz After googleing a bit, I saw that FPGA could be used for such a duty. As the Atlys had hdmi input and output, I decided to get one to see if i could manage such a thing. And it was a good oportunity to learn new things too !! =) Happy to join your community, i will probably have tons of questions for you guys !!! Cheers Link to comment Share on other sites More sharing options...
D@n Posted July 18, 2017 Share Posted July 18, 2017 @chcollin, Welcome to the forum! Sounds like you have a fun problem to work with, and an old but still pretty good board to start from! I am also working on a Video project, very similar to yours. If you choose to build your design in Verilog (vice VHDL, or schematic whatnot), then we may have a lot in common. You can see how some of this code integrates into the rest of my system here, although in many ways this is still a work in progress. The file I just linked is an AutoFPGA data file. AutoFPGA is being designed, in many ways, to be an alternative to the schematic type of system design ... while still preserving the Verilog look/feel of the resulting design. In many ways it's a glorified cut/copy/paste program, but it also handles hooking components up to a wishbone bus, interrupt assignment, and more. My point here is just that ... an AutoFPGA configuration file should read very much lika a combination of Verilog, and C source files--since it is mostly a cut/copy/paste project--and so you should find that file to be quite legible (once you understand C and Verilog ). Oh, almost forgot my point: if you get stuck, holler, I may have already gotten past what you are struggling with. Dan Link to comment Share on other sites More sharing options...
chcollin Posted July 18, 2017 Author Share Posted July 18, 2017 Hi Dan, thx for your message and resources. On the Atlys resource page on the Digilent site, there was a HDMI example project I downloaded. I wanted to try it and eventually use it as a starting point / base for my devs. Unfortunaly, i have a hard time with it. I can build it with ISE 14.7, program the Atlys and run it. However, it seems no interrupts are received when i press pushbuttons :/ On a fresh ISE 14.7 install, are there specific files / libs / plugins that need installing so that elf binaries run as expected on this platform ? Hdmi output seems OK. I succeeded in drowing things on screen Any suggestion for this pushbuttons problem ? Cheers Link to comment Share on other sites More sharing options...
D@n Posted July 18, 2017 Share Posted July 18, 2017 @chcollin, No ... I'm not using the Xilinx SDK/EDK at all, so I might not be able to help. (I'm using a Vendor independent processor, the ZipCPU, any time I need CPU support. Getting interrupts from buttons on the ZipCPU is, in my most humble opinion, easier than getting interrupts from buttons in MicroBlaze--mostly because I've never tried to get interrupts from MicroBlaze.) Go ahead and ask your question on the FPGA forum, and let's see if anyone bites. Dan Link to comment Share on other sites More sharing options...
chcollin Posted July 18, 2017 Author Share Posted July 18, 2017 Thx Dan, Let me follow your advice and post in the right section Cheers Link to comment Share on other sites More sharing options...
jpeyron Posted July 18, 2017 Share Posted July 18, 2017 Hi @chcollin, Could you post screen shots of what you are getting in the serial terminal from the buttons(tera term)? cheers, Jon Link to comment Share on other sites More sharing options...
chcollin Posted July 19, 2017 Author Share Posted July 19, 2017 Hi @jpeyron, Thx for your help. I'm at work right now but will follow your instructions when back home. I opened a topic for this matter on the FPGA section as suggested by @D@n, you can find it here : Cheers Link to comment Share on other sites More sharing options...
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