DAP(JTAG port open error. DAP status f0000021)

[electronicsdevices]

I wanted to do a simple Hello World file in Vivado 2015.4, so I made a design with just the ZYNQ processor. After generating the bitstream and exporting to SDK 2015 however, I get this error:

I don't know if the error is caused by something with PS initialization, so I included some of it here:

[jpeyron]

Hi @electronicsdevices,

I have seen the DAP status f0000021 when the mode was set to sd. For the Zybo the mode is set with JP5. I have also seen this error when the zynq processor is not configured correctly.  I would suggest at first to not mess with the default setting in the processor. You block design is correct with having FCLK_CLK0 connected to M_AXI_GP0_ACLK. Let us know if you are still experiencing this issue when using the default setting for the zynq processor. Also just to verify, you have the board files installed?

cheers,

Jon 

[electronicsdevices]

@jpeyron

JP5 is set to JTAG

The default setting for the ZYNQ processor doesn't have UART0 configured, so when you try to set up the hello world program, it won't allow it.

 

I don't have the board files installed on this build, so I manually configure it each time

 

 

 

 

[jpeyron]

Hi @electronicsdevices,

I have attached a complete basic hello world project without using the board files. There are a few changes you need to do to the timing ,ddr delays and ddr type. I also was able to run the project without changing the ddr type as well. This project has the changed ddr type. Hope this helps. I used the board files and looked at the zynq settings to help me configure this project. It might be helpful to install the board for reference even if you decide to not use them. 

cheers,

Jon

basic_hello_world_no_board_files.zip

[electronicsdevices]

@jpeyron

Thank you. I will take a look at this when I have more time.