Xilinx Get XAPP1170 Working on ZYBO Board in Vivado 2017.1

[electronicsdevices]

I've been trying to get XAPP1170 on a ZYBO board for a while now in Vivado 2017.1. The problem is that it was made in VIvado 2015 for ZC702 instead of a ZYBO, so I've been trying to port it over. At first I thought you could just upgrade and convert everything to Vivado 2017, but I ended up getting blackbox errors because the IP was made for the ZC702.

Here's what I've done so far:

 

1) Used VIvado HLS to generate the Matrix Multiplication Accelerator IP specifically for the ZYBO board.

2) Changed the project to generate code for the ZYBO board and updated IP.

3) Disconnected all pins on the ZC702 version of Matrix Multiplication Accelerator IP.

4) Deleted ZC702 version of Matrix Multiplication Accelerator IP.

5) Placed ZYBO version of Matrix Multiplication Accelerator IP onto block design.

6) Connected all pins of the ZYBO version of Matrix Multiplication Accelerator IP to their corresponding IP's.

7) Went to validate design. Got this error

 

8) Assigned address to missing address block.

9) Validated design.

10) Generated bitstream.

11) Deleted .sdk folder.

12) Exported design with bitstream.

13) Generated .hdf and .bsp for project.

14) Manually put in main.c, platform.c, platform.h, lib_xmmult_hw.c, lib_xmmult_hw.h, and platform_config.h.

15) Manually changed macros with ...HLS_1... to ...HLS_0_...  to reflect the xparameters.h file that was generated.

The project will compile and run, but I get no output on the console.

The only clue I have right now is a warning I got:

missing initializer for field 'HandlerTable' of 'XScuGic_Config {aka struct <anonymous>}' [-Wmissing-field-initializers]    xscugic_g.c    /MMultAccel_7_5_17_bsp/ps7_cortexa9_0/libsrc/scugic_v3_6/src    line 53    C/C++ Problem

 

This is the definition of the struct:

typedef struct
{
    u16 DeviceId;        /**< Unique ID  of device */
    u32 CpuBaseAddress;    /**< CPU Interface Register base address */
    u32 DistBaseAddress;    /**< Distributor Register base address */
    XScuGic_VectorTableEntry HandlerTable[XSCUGIC_MAX_NUM_INTR_INPUTS];/**<
                 Vector table of interrupt handlers */
} XScuGic_Config;

and this is what was generated for xscugic_g.c:

 

 

#include "xparameters.h"
#include "xscugic.h"

/*
* The configuration table for devices
*/

XScuGic_Config XScuGic_ConfigTable[XPAR_XSCUGIC_NUM_INSTANCES] =
{
    {
        XPAR_PS7_SCUGIC_0_DEVICE_ID,
        XPAR_PS7_SCUGIC_0_BASEADDR,
        XPAR_PS7_SCUGIC_0_DIST_BASEADDR
    }
};

So it looks like XScuGic_VectorTableEntry HandlerTable[XSCUGIC_MAX_NUM_INTR_INPUTS] didn't get generated, and I don't know where to go from here.

 

Can anybody get this running on their ZYBO board?
 

You can download my project, along with the original XAPP1170 source and the pdf of the Xilinx Lab here:

https://github.com/electricbluefire/MMult/archive/master.zip

 

[jpeyron]

Hi @electronicsdevices,

Unfortunately, I do not have experience with the XAPP 1170. I will reach out to my co-workers to see if they have any input for you. One potential thought is to first get the zybo to work with this project in the same vivado version that the project was made in. 

cheers,

Jon

[electronicsdevices]

@jpeyron

Thank you for that. I took your advice and downloaded the 2015 versions of the software I needed. That got me out the rut I was in.

I synthesized the part in 2015 HLS with the .tcl script and ran the .tcl script (after modifying the custom IP directory). However, I have a new fun problem ... the ZYBO board doesn't have enough DSPs for the design

The design uses three 32X32 floating point matrices. I'm going to try and use 16X16 floating point matrices and see if that reduces the number of DSPs.