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enable ARM coresight


soha

Question

I have loaded a Xillinux OS on the Zedboard. Currently, I'm trying to enable the ARM CoreSight feature to perform program trace. My question is, is there any starter guide or tutorial for how to enable the CoreSight feature and offload the collected data to the PL? I've searched online and the only thing I can find related to CoreSight iis the official documentation, introducing the architecture, interface, etc. However, I can't find an example to start with. Any help? Thanks.

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17 hours ago, jpeyron said:

Hi soha,

I do not have any experience with coresight or Xillinux OShere is a link with information using petalinux and coresight. Here is a link to a github dealing with linux and coresight. Here is a link to the github for Xilinx coresight. Hope this helps!

cheers,

Jon 

 

Hi Jon,

Thanks for your reply. A quick question, is there any alternative option to achieve my objective without using CoreSight? Specifically, is there a way to dump processor-related information (e.g. current instruction, register value, etc.) without using CoreSight? Thanks.

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1 minute ago, D@n said:

@soha,

Gosh ... I don't know that answer, but I can say that there are ways of doing that for Open Source processors without using CoreSight!

Dan

If you can't answer the question you are asked, answer the question you can answer.  :D

 

Hi Dan,

Thanks for your reply. I'm also looking for alternative option without using CoreSight to achieve my goal. I'm not sure if CoreSight is necessary in my case. Actually, the essential point in my case is that I have to implement a custom logic which can dump processor-related information (e.g. current instruction, register value, context ID, etc.) in order to track/monitor the processor state. The trace function must be triggered through pure hardware logic. For example, if I press a button on the board, my custom logic will start talking to the processor, dumping the necessary processor-related information, and offloading it off-chip to my PC for analysis. Is this can be done? Any suggestion? Thank you so much.

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@soha,

My problem is that I know nothing about coresight.  I'm not sure anyone here does.

If your problem weren't that you needed to get information from the internal parts of an ARM processor, or that you needed to use coresight, I could offer a lot to help you.  For example, I could offer you a trace capability to monitor your bus, to see what values are read or written from the bus on any given clock, even to write the results into a VCD file so they can be plotted in gtkwave (code not posted ... yet), but ... I don't know how to get inside the ARM CPU to get that information.  I know how to get inside of a ZipCPU--that's a lot of what I've been doing recently, just not an ARM core.

Dan

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14 minutes ago, D@n said:

@soha,

My problem is that I know nothing about coresight.  I'm not sure anyone here does.

If your problem weren't that you needed to get information from the internal parts of an ARM processor, or that you needed to use coresight, I could offer a lot to help you.  For example, I could offer you a trace capability to monitor your bus, to see what values are read or written from the bus on any given clock, even to write the results into a VCD file so they can be plotted in gtkwave (code not posted ... yet), but ... I don't know how to get inside the ARM CPU to get that information.  I know how to get inside of a ZipCPU--that's a lot of what I've been doing recently, just not an ARM core.

Dan

 

Hi Dan,

Thank you for your information. Unfortunately, my task is to get the internal information of an ARM processor... While the IP core cannot be modified, the task is even more difficult... I will keep thinking anyway... Thanks

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21 minutes ago, jpeyron said:

Hi soha,

Unfortunately i have never used coresight. Here is more documentation i found that uses coresight. I see you have reached out to Avnet. Have you reached out to Xillybus or Xilinx? 

cheers,

Jon

 

Hi Jon,

Yes, I also asked Xillybus about the question but it seems no one there has the experience on coresight.... I'm counting on someone in the Xilinx community may help but haven't received any reply... Anyway, thanks for your help! :) 

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