Problem getting started with cmod s6

[noob_fpga]

Hello everynone!

I recently have been thinked of starting with fpga's , so I choosed first spartan cmod s6 dev board.

I have been try to instal several stuff , but as far no luck yet. 

Simply, the windows 10 64-bit, does not regonize my spartan cmod s6 board at all. Example, I installed digilent latest version of Adept, several times with all windows user modes. 

Am I totally missing something very basic here, what comes getting even started? 

I supposed that the boatd has already some usb bootloader installed in it's atmega16's chip and the application automatically installs some device drivers , so that I will be ready for next, getting hand some of the application, which I need to program the the fpga chip. (Without missing that point , that I have still tutorials and more to left read, that I learn programming basics, etc.)

So please help that I can hopefully soon develop even something simplest thing, and finally some day , are able to for sonething more complex, like simple 8-bit mcu inyterface:)

[D@n]

Hello @noob_fpga,

I think you'll find the CMod S6 a wonderful platform to work with--especially for the price range.  I've used it to date with a lot of success, and had some fun with it.  (You can find my S6SoC project, one that places a system on a chip onto the S6 and then runs multiple embedded programs on it at once, here.)

Sadly, though, I'm more of a Linux guy than a windows guy.  Perhaps when the digilent staff gets back in, they might help you more.  But in the meantime, can you tell me more of what's going on?  All you've said is that it doesn't work, or that the device doesn't connect.  Can you describe what is taking place?  How do you know it isn't working?

I recall from my own project that I needed to run the commands "djtgcfg enum" and "djtgcfg init -d CmodS6" to enumerate an initialize the device.  Are these programs you are able to run with your S6 on your windows platform?

Dan

[noob_fpga]

Hi! 

At first thank you for your answer, D@n.

So back to the problem and for  the latest situation which I am now. So far I have succesfully installed Xilinx latest version of ISE, The istaller's info and itself tell's that it comes with needed drivers for example all kind of spartan 6 series fpga's and  also spartan 6 cmod s6 datasheet tells  that ISE is one of that is only officially supported.

Device itself seems to be physically fine. It has it factory loaded some kind of demo that datasheet tells too, and as soon it's powered by the usb, the one red power led lights up and then also on board led start blinking with something like 1 hz, with two other on board leds respond with lighths up too, if push some on board button.


Now I finally have something software which is supported( I suppose, now) but now I'm feeling like newbie in fist time with logic gates and electronics(which in real, I totally don't be) ,and feels like I'm very lost. The whole process from start to the end with ISE project, is very unclear from with first sure I have to learn more example ,verilog basics.

Yesterday I googled some fpga tutorial stuff, even the simplest.  Some's guy website, example and youtube videos. "Do some some and gate with clocking possibility first, the very very basic..." It was in verilog example, few lines only and I still failed, and finally gave up. When I had to determite my own board 1/0 pin functions vs. verilog code and ISE pin mapping , even which simply the actual codes copy paste wasn't enough anymore, because I had to define which pins I use and the pin names , I don't know if errors which I had here, were that all debended of ISE's pin mapping philosofy or/and my own verilog code understanding and it's syntaxes.

And so far too, it is still unclear, if even my device is regonized by the ISE, or my the windows OS itself, and I'm confused of that , because  the windows usually regonized even some of my failed  mcu usb programming interfaces without any bootloaders at all, and there were something like "unknown device" in the device manager. At least and for now, I am not seeing a thing in device manager with my spartan 6 board. Is there anything like  somekind of debugger, which tells if the board is regonized of not? 


The main  reason because I puchased something like fpga, was that I was very interest HW, and programmable logic example in breadboard and logic simulator level. Arduino and most of it's C programming were clear too.  And my Breadboard desgn's comes more and more complex and tooking hundreds and even more wires there and there that put me thinking finally to something like simply FPGA. Feel's pretty boring and I.m little pissed that I must develop some even basic logic gates first  , which I can control one led with two buttons , because that itself is allready too clear. If there were very very step by step guides for spartan fpga 6 cmod s6 with ise, or something program(s), which gives programminng and developing bossibilities in the same time more clear, I would be very happy and thankful.

Hope too that ,it wasn't too stupid to buy something like fpga with like zero vhdl/verilog programming skillls.

E:thanks for sharing your great stuff too, sure I will check that out too!

 

[D@n]

@noob_fpga,

Wow, that's a lot of material to work with.  Where shall I start with a response? 

I think I'll start at the bottom, where you said, "Hope too that it wasn't too stupid to buy something like an FPGA with zero Verilog programming skills."  To that, my response is that you must start somewhere, and the CMod S6 board is specifically designed to be a starter board for individuals like you.  If you haven't noticed, Digilent tends to make it's business by selling boards to engineering schools, classrooms, and students.  In other words, 1) you are in the perfect place, and 2) you are among friends.

Next, take a look around the Digilent site.  Click on the "Learn" button up top.  You should find many useful lessons that you can try to learn from.  Feel free to try, learn, and practice.  I kind of like the fpga4fun.com web site, and I'm sure others might pipe in with other things you can do.

Now, moving on to programming the CMod S6.  As I recall, I never programmed it from ISE, neither from any Xilinx program.  Digilent provided a set of utilities as part of their Adept software package that were necessary to program it.  As a result, the processing flow would be:

1. 1. Build your logic design with ISE
   1. This means you'll need to include your Verilog (or, <gasp!> VHDL) source code into your design within ISE
   2. You'll also need to include a UCF file.  For this file, start with the one Digilent provides from their web page.  Edit it, by commenting out pins you are not using, or renaming them as you see fit.
   3. Tell ISE what Verilog file contains your "top level"--you know,  the one that actually connects to physical pins as opposed to internal logic.  (Right click on that top level file, and select "Set as Top Module" in the menu that follows.)  Incidentally, this will solve the I/O pin mapping problem you mentioned above.
   4. To synthesize your design, click on the "Synthesize" button in the Design tab underneath the hierarchy window.
   5. Deal with any errors that show up, and synthesize again until you don't get any errors.
   6. Click on "Implement Design", adjust for any errors and repeat, until your design builds properly.
   7. Repeat with "Generate Programming File".  This will generate the file that will actually be used to "configure" your device.  (Don't ask me why, but the FPGA designers are particular about the fact that you don't "program" their devices, you "configure" them.)
2. You should now be able to find a "<something>.bit" file within the massive number of files ISE creates.  That's your configuration file, and the "<something>" part should be the name of your top-level module.  (You might also find a "<something>.bin" file ... the two are almost the same, with the difference that the "<something>.bit" file contains a proprietary header, and the "<something>.bin" file usually requires explicitly telling ISE to build it in your configuration.)  The configuration file is the one you actually want to load into your FPGA.
3. Now, using the Adept tool djtgcfg, load this file into the board.  (While Digilent may have a plugin for ISE to do this same thing, I'm only familiar with the Adept tool.)
4. Does it do what you want?  Why or why not?

(These instructions come off the top of my head.  They are guaranteed to be in error somehow, but they should provide you with the general programming flow of the CMod S6)

Okay, so ... here's some more advice for the beginner: Plan for communicating between your computer and the CMod board.  Digilent provides a DEPP library for that communication.  Look up how that works.  (I found a PDF manual within the Adept utilities download.)  This becomes important really fast, because as your designs become more and more complex, you are going to need to figure out, at some time, why are my designs not working? For that, you would like to "ask" the FPGA what is going on within it, and to do that you really *need* some means of asking and some means of the FPGA "talking" back to you.

For myself, I do this "talking" over a bus-type structure.  That structure allows me to read and write addresses on the chip, sort of like memory, except I map all my peripherals to memory addresses.  I even have one "peripheral", or FPGA function, whose sole purpose is to record what's going on within the chip and to let me look at it later.  Think of this as sort of a scope with a trigger.  Once the trigger goes off, you can look at the logic before, during or after the trigger.  That means the trigger might be an error condition, the beginning of an operation, ... you name it.

If you at all look into my own s6soc project, you'll find this "simplified" means of interacting with the device as part of the "alttop.v" file, or even the "altbusmaster.v" file.

That brings up another useful topic.  Often times designs will need to use parts of the chip that act like black boxes--things like PLLs to adjust your clock speed and such.  It's generally considered good coding practice to place these either in the top level file, or in a chip-specific file nearby.  In my case, I place these specific functions in the alttop.v file.  What that allows me to do is to simulate my entire design using Verilator--a Verilog to C++ translator, working from the altbusmaster.v module and below, that allows me to test logic apart from the hardware using (my favorite) a debug-by-printf approach.

So, let's talk about simulation for a moment.  Often, it is easier to simulate your hardware and parts and pieces of your hardware, than it is to actually test it.  Further, a good simulator will tell you what wires are doing what within your design logic--in other words, it helps you debug your code before you touch hardware.  I use Verilator for this purpose, although I suspect I may be unique among others on this web site. Hopefully this will make some sense for you.  If not, try any example CMod S6 projects, try google, try the learning modules Digilent provides, look over fpga4fun.com, or come back to this forum if you have further questions.

Indeed, please come back immediately if you can't figure out how to get your first design onto your board.  This is the best place you will find help for such problems--even if you need to wait for the Digilent staff to show up during business hours to help you further.

Yours,

Dan

 

[noob_fpga]

Thanks! I appreciate very much for all of those things you wrote and listed, taking your time. 

If I have to, I will back to the topic as soon as i have spent my time enough to do , and learn the things you listed.

One thing(suprisingly) still more...One thing which I personally find usefull of maybe learning new things of like these just at the beginning, is first almost totally copying someone else simply desing example by step by step and looking differet parts of design afterwards, do completelly some parts itself, afterwards, differently and repeat and try to get working those too. That may be sounds awkward, but, in fact thats work in the beginning for me personally.

So that would be great too if there totally complete example design for absolutelly for cmod s6 board. So one newbie like me, can check the pinout and every else steps and "burn" or as you said, configure the design almost straight for the board , that example would be the simplest things ever, like one logic gate with only 3 pins used. In fact, that and gate thing I found was enough good for start, but that guy who did that used different board so, back to the botton, for reading facts for designing and tips and asking help. Your help was already enough or even more good and usefull for me and sure for someone else who read that and is just started with cmod s6. But if you know if somewhere is some similiar materials I just said , that would be exra great. 

 

[noob_fpga]

Now I have some issue again..with ISE, It crashers several situations, example, now it shut down every time I click open project. The others situations are that pogram simply freezes,  windows error window appears and tell it needs to close. One reason maybe exits, when it freezes and have the error winws appeared, then it says sometimes that some debugger have to be on, in some options menu. But I don't think that the main reason. 

Maybe it's time to try Adept again, but last time , as I already told, My device didn't regonized at all, when I started adept. The ISE's freezing issue is serious, because so far itäs only working application for me , for now. 

The PC I used is enough decent  I think , what come to overal performance and ram etc. I have been thinked of installing linux for my rooted android sytem based tablet ,with quad core and about 2 gt ram memory, but last time the OS image file that I downloaded didn't worked in some kind of random free application which I tried^^ Sorry maybe Iäm going to out off topic, but linux is serious opinion if I will get the OS working in my tablet which I heard is possible. And FPGA- like things will work more propeply on that OS.

BTW ,I'm sorry if it was supposed to greate new topic for this crashing issue and not to add it here.

[jpeyron]

Hi noob_fpga,

Here is a link that talks about issues with ise and windows 10 and some solutions. Here is some information on step by step usage for the Cmod s6.

cheers,

Jon