user32 Posted May 7 Share Posted May 7 Are the SDA and SCL pins on the cora board PL only? The xdc has them as being P15 and P16 on the SoC - how do I find out if these correspond with the MIO numbers in vivado? Where can I even find a pinout showing what pins are MIO pins? I have i2cdetect running in linux on the board but the lines never go low and cant find anything on the bus... thanks Link to comment Share on other sites More sharing options...
0 user32 Posted May 8 Author Share Posted May 8 (edited) it looks like you can't use the I2C in the PS on the cora board because they didnt map any MIO for it and in order to use the i2c maste rin the PL you have to pay for it? sucks that I bought i2c hardware I cant use... Edited May 8 by user32 Link to comment Share on other sites More sharing options...
0 JColvin Posted May 8 Share Posted May 8 Hi @user32, You are correct that the ChipKit/Arduino I2C header (the ones with the on-board pull-up resistors) are only connected to pins P15 and P16 on Bank 34 and are not connected to any of the MIO pins. I do not know what you mean by "in order to use the I2C master in PL you have to pay for it" statement though. Thanks, JColvin Link to comment Share on other sites More sharing options...
0 user32 Posted May 9 Author Share Posted May 9 12 hours ago, JColvin said: I do not know what you mean by "in order to use the I2C master in PL you have to pay for it" statement though. @JColvin thanks for the confirmation, and regarding the I2C controller in vivado I was referring to this in trying to place the i2c master: Link to comment Share on other sites More sharing options...
0 JColvin Posted May 9 Share Posted May 9 Hi @user32, Understood. I am not familiar with that particular IP and am not certain what features it offers. I, and Digilent, usually use the AXI IIC Bus Interface, https://www.xilinx.com/products/intellectual-property/axi_iic.html, which is included with the free version of Vivado and as noted in the AMD product description it supports all features of I2C aside from the high speed mode of 3.4 Mbit/s. If you are using the Cora Z7 board file from Digilent, you can then have Vivado automatically assign the I2C output of the AXI IIC connection to a "shield_i2c" which will automatically associate those external pins to the correct P15 and P16 pins for you. Let me know if you have any questions. Thanks, JColvin user32 1 Link to comment Share on other sites More sharing options...
0 user32 Posted May 10 Author Share Posted May 10 @JColvin thanks! being able to get this working would be a big relief... So is this I2C interface then accessible from user-space in linux for use with i2cdetect and i2cset/get commands? Vivado is really impressive in the sense that I find it often automating way more than I expected- do I need to interface with the i2c bus through calls into AXI in a linux app or does the device tree that vivado generates set linux up to be able to talk directly to it? thanks for the screenshot as well, it is very helpful! Link to comment Share on other sites More sharing options...
0 JColvin Posted May 10 Share Posted May 10 Hi @user32, For clarity, I generated that block design by: - Selecting the Cora Z7 in the initial project creation - Opening the block design, adding the Zynq7 processor IP, then running Block Automation with the default settings - Add in the AXI IIC IP, then run Connection Automation with the IIC connection dropdown option set to "shield_i2c" - Verify the block design, let Vivado create the HDL wrapper around the block design, click generate bitstream I am less familiar with the (Peta)Linux side of things, but my understanding is that whatever is integrated into the Vivado hardware design (i.e. the hardware platform export, the .xsa) should then be accessible via whatever Linux calls. There is some more information that might be helpful to you in these two threads here: Let me know if you have any questions. Thanks, JColvin user32 1 Link to comment Share on other sites More sharing options...
0 user32 Posted May 14 Author Share Posted May 14 thanks for the input and additional links, the one referring to the dt seems to be barking up the right tree but I don't really have any experience in making changes ta this level yet. I have the IIC integrated into the block design as you showed with your previous post and now SCL and SDA don't sit high which I didnt expect... I found this after reading through one of the links you shared: https://www.adiuvoengineering.com/post/microzed-chronicles-petalinux-i2c-in-the-ps-and-axi-iic and am going down this route now... thanks again for the input, I post up if I get anything working... Link to comment Share on other sites More sharing options...
0 user32 Posted May 22 Author Share Posted May 22 haven't been able to get anywhere on this, posted here, reddit, and xilinx forums for some help and no luck... wonder what other options I have for interfacing an imu Link to comment Share on other sites More sharing options...
0 user32 Posted May 29 Author Share Posted May 29 got so far as to realize that the issue seems to be that there is no interrupt information specified with this core... in the dmesg: xiic-i2c 41600000.i2c: error -ENXIO: IRQ index 0 not found also all other examples that show the device treee include a interrupt-parent and interrupts entry that is missing from mine. Trying to figure out where this information comes from in vivado... i see some information that seems to detail a port for interrupt but i dont know what to do with it: Link to comment Share on other sites More sharing options...
0 user32 Posted May 30 Author Share Posted May 30 On 5/10/2024 at 12:17 PM, JColvin said: Hi @user32, For clarity, I generated that block design by: - Selecting the Cora Z7 in the initial project creation - Opening the block design, adding the Zynq7 processor IP, then running Block Automation with the default settings - Add in the AXI IIC IP, then run Connection Automation with the IIC connection dropdown option set to "shield_i2c" - Verify the block design, let Vivado create the HDL wrapper around the block design, click generate bitstream I am less familiar with the (Peta)Linux side of things, but my understanding is that whatever is integrated into the Vivado hardware design (i.e. the hardware platform export, the .xsa) should then be accessible via whatever Linux calls. There is some more information that might be helpful to you in these two threads here: Let me know if you have any questions. Thanks, JColvin @JColvin I decided to start over entirely and tried to do exactly what you described and ran into the same exact issues where interrupts appear to be missing, probably a total longshot, but are there any xsa or project files available I could try to load on my cora that have i2c working? I'm just not making any progress on this board anymore and am considering trying to pivot to something more popular... thanks Link to comment Share on other sites More sharing options...
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user32
Are the SDA and SCL pins on the cora board PL only?
The xdc has them as being P15 and P16 on the SoC - how do I find out if these correspond with the MIO numbers in vivado?
Where can I even find a pinout showing what pins are MIO pins?
I have i2cdetect running in linux on the board but the lines never go low and cant find anything on the bus...
thanks
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