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Hello, I am mating an Analog Devices EVM high speed ADC daughter card to the NEXSYS VIDEO card via the FMC connector. SERDESE2 LVDS serial lanes are used. It would be very helpful if you could provide information on how the LVDS lanes are routed on the NEXSYS VIDEO board.

I am currently having difficulty tuning the IDELAYs in the Artix 200 -1. I would like to choose the optimum diff pairs lanes for this evaluation. 

Can you please provide some insight on how the diff-pair signals on the ARTIX to FMC are routed (sheet 2). What routing constraints were used? Are the signals matched length. I do see some serpentine routing on the top side layer of the PCB.

Thank You

Bob Ledoux


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Hi @BLedoux,

The Nexys Video FMC signals are routed with 100 Ohms differential impedance for each pair:

Another post from the design engineer for the Nexys Video mentions this as well here:

I am not certain what information you are looking for with regards to routing constraints, but I'll be happy to find out more information for you.

Let me know if you have any questions.


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