BLedoux

Hello, I am mating an Analog Devices EVM high speed ADC daughter card to the NEXSYS VIDEO card via the FMC connector. SERDESE2 LVDS serial lanes are used. It would be very helpful if you could provide information on how the LVDS lanes are routed on the NEXSYS VIDEO board. I am currently having difficulty tuning the IDELAYs in the Artix 200 -1. I would like to choose the optimum diff pairs lanes for this evaluation. Can you please provide some insight on how the diff-pair signals on the ARTIX to FMC are routed (sheet 2). What routing constraints were used? Are the signals matched length. I do see some serpentine routing on the top side layer of the PCB. Thank You Bob Ledoux