Requesting for sdk code for xfft

[T106A81]

hiii

 i generated a sine wave with 100Mhz frequency by using a dds compiler. i connected the output of dds with the xfft ip core through a data fifo. i connected the xfft to the zynq with the dma. i generated the bitstream without any errors. i am wondering for sdk code to my block design. anybody please help me ...

[artvvb]

Hi @T106A81

I have not personally used Xilinx's DDS or FFT IPs. If you haven't reviewed their documentation, you should. pay attention to sections that talk about the formats of AXI stream interfaces in and out. FFT seems to be described in PG109, DDS in PG141. PG141's "AXI4-Stream Considerations" section (page 30) and the corresponding section of PG109 are both relevant. On an initial read of these sections, you likely need to introduce additional logic to the hardware design that can frame packets for the DMA; that can assert the TLAST signal at the appropriate time.

For the DMA software side of things, you may find the example and common stumbling blocks that I described in this thread helpful:

How you configured each IP is also relevant - the software described in the link above makes various assumptions about the configuration of the DMA core.

Thanks,

Arthur