Maximum current and voltage from USB104 ZMOD port

[Dr.J]

What is the maximum voltage that can be supplied from the ZMOD port on a USB104? The documentation says that the USB104 conforms to the SYZYGY standard, which means both 3.3V and 5V should be available. However, on the Diligent USB104 reference page it says 1.2V to 3.3V:

https://digilent.com/reference/programmable-logic/usb104a7/start

...which would mean it differs from the SYZYGY spec. Does this 3.3V just refer to the various signal pins or also to the 5V supply rail?

Also, if the 5V is supplied, does this provide up to 1.2A as specified? We have an analogue board we need to power that could be quite power hungry.

Edited February 2 by Dr.J
Additional info

[JColvin]

Hi @Dr.J,

Unless I'm mistaken, both 3.3 V and 5 V are available on the USB104A7. The 5 V rail is the SYZ5V0 as noted in Table 1.2.1 in the USB104A7 Reference Manual: https://digilent.com/reference/programmable-logic/usb104a7/reference-manual#power_specifications. You can see this rail on the schematic on page 2 and page 12: https://digilent.s3-us-west-2.amazonaws.com/resources/programmable-logic/usb104a7/USB104_A7_sch.pdf.

I'm not sure where you are getting the 1.2 Amp requirement for the 5 V supply, as it there is explicitly no minimum current requirement listed in Table 9 of the SYZYGY Specification version 1.1.1 from September 2023: https://syzygyfpga.io/specification/, but as per Table 7.1.1 in the USB104A7 Reference Manual the 5 V rail will supply up to 1.5 A in total: https://digilent.com/reference/programmable-logic/usb104a7/reference-manual#zmod_port.

The 1.2 V to 3.3 V is for the VIO supply voltage, which is within the recommended range also noted in the same Table 9 in the SYZYGY Specification 1.1.1.

Please let me know if I am misunderstanding your question.

Thanks,
JColvin

Edit: After re-reading, I see you were referring to the main landing page/Resource Center for the USB104A7. I have updated that page to better indicate that it is the VIO supplies specifically that are 1.2 to 3.3 V.

[Dr.J]

Hi @JColvin,

That's really useful: thank you. I'm particularly glad we can get 5V from the ZMOD port. If you look at the specifications from the URL I linked to above, under "Electrical", it says:

SYZYGY Connectors: 1.2V to 3.3V, up to 1.2A depending on power source. Automatically negotiated on board bring-up

So that's where I was getting the 3.3V and 1.2A limits from. If I understand you correctly, this is for the various VIO ports, not the supply rail. We don't need to drive high currents over the VIO ports but may need more than 1A on the 5V supply rail.

[JColvin]

Hi @Dr.J,

Okay, I understand the confusion. I have updated that box on the Resource Center to better clarify that this specification is for the VIO ports.

Regardless, I would defer to the dedicated section in the Reference Manual, https://digilent.com/reference/programmable-logic/usb104a7/reference-manual#zmod_port, for specifics.

Though I suppose it's worth noting that the Table 7.1.1 lists 1.0 A (VIO Group 1) on the VIO Supply Current rather than 1.2 A, but this stems from the VADJ rail that the VIO supply comes from (page 11 of the schematic, https://digilent.s3-us-west-2.amazonaws.com/resources/programmable-logic/usb104a7/USB104_A7_sch.pdf) can supply 1.2 A of current, but only the SYZYGY port itself and a lone LED indicator draws from this supply rail.

Let me know if you have any questions.

Thanks,
JColvin

[Dr.J]

Hi @JColvin,

If the VIO supply current is limited to 1.2A, what about the 5V supply current? Will that provide the 1.5A in the SYZYGY specification? Given that one can use an external power supply up to 6A does this mean more current is available to the ZMOD connector?

I'm a little confused about the VCC5V0 current values given in the power specifications table 1.2 in the USB104 reference manual which seems to suggest as much as 3A is available on the 5V rail. The more current we can supply through the ZMOD connection the better.

[JColvin]

Hello,

So, the 1.5 A total for the 5 V rail that I mentioned is listed in Table 7.1.1 in the USB104 A7 Reference Manual (https://digilent.com/reference/programmable-logic/usb104a7/reference-manual#zmod_port), is not a SYZYGY Specification. It is a design choice made by Digilent.
You can see that the SYZYGY 5 V rail is limited to 1.5 A on the first page of the USB107 A7 schematic in the power tree diagram.

I am not certain where you are getting from the Power Rail Specifications Table 1.2.1 that the 5 V rail can supply 3 amps. The line entry I presume you are looking at is for the 3.3 V rail, which is derived from the 5 V rail, as noted by the "upstream net name" in the second column.

Regardless, you cannot supply more than 2 amps to the 5 V rail as per Table 4.1 in the SYZYGY (not Digilent) Specifications: http://syzygyfpga.io/wp-content/uploads/2023/09/Syzygy-Specification-V1p1p1.pdf.

The reason why Digilent provides a 5 V 6 Amp power supply (30 Watts total) is to meet the power budget outlined in Table 1.2.1 as each rail (the Net Name column) is derived from the VCC5V0 net.

Let me know if you have any questions.

Thanks,
JColvin

[Dr.J]

Hi @JColvin,

Thanks for clarifying. I think I was getting the 3.0Amps current from misreading Table 1.2.1.

I have another question regarding LVDS signalling from the USB104. We need to design a ZMOD daughterboard to interface with some analogue electronics that is built around a Texas Instruments DDC232 chip. We are sending 5 of our more time-critical clock signals as differential pairs and the remaining 3 as single-ended.

We would like to send the differential pairs as LVDS pairs since that's what our analogue electronics is currently set up for. What is the maximum voltage we can use for LVDS pairs on the USB104 through the ZMOD port to a SYZYGY daughterboard? 3.3V, 2.5V or 1.8V? If its not 3.3V, can we use 3.3V for the single-ended signals?

Also, would the only way to supply more than 1.5A to this ZMOD board be to attach another external power supply? It sounds like there is no way of passing more than 1.5A at 5V from what you are saying. Our analogue boards are rather power hungry...

[zygot]

Dr.J: "Our analogue boards are rather power hungry... "

Perhaps, as you suspect, you need to power your analogue boards separately. Don't confuse Vio rails with device power rails. Not all devices have power supply pins for IO that are separate from the device power supply pin. FPGA devices do. Many analogue devices with digital control signals do as well.

Don't assume that an LVDS standard as defined by an FPGA vendor is totally compatible with the LVDS specifications of any random device supporting differential signals. The proper thing to do is read the datasheet for the FPGA you intend on using as well as the Series7 Select IO User Manual supplied by AMD/Xilinx. There are application notes to help with designing circuitry to make differential signalling compatible with arbitrary LVDS signals.

Generally, the Vadj voltage rails used with FPGA devices are only intended to power Vio pins on whatever device is on the other end of the FPGA pin signals. Series7 FPGA devices don't support LVDS standards for Vadj (Vccio) above 2.5V. That doesn't mean that you can connect arbitrary devices with differential signalling to an FPGA, just that you might need to condition the signalling to make both ends compatible. Series7 FPGA devices support LVCMOS_33 or LVTTL_33 3.3V single-ended signalling. The devil is in the details, and the details are specific to the exact circuitry that your analogue boards use.

Vadj power rails on FPGA boards just means that the user can select from a limited number of Vccio voltages. In FPGA devices, the Vccio Voltage that drives an IO bank determines what IOSTANDARD the IO pins can be compatible with. SYZYGY is a standard supporting differential signalling for a range of Vccio voltages. The Series7 documentation is pretty good at covering this. Edited February 13 by zygot

[Dr.J]

Thank you @zygot — that's extremely helpful. For multiple ADC boards we are implementing an external power supply on the ZMOD board that will supply the current we need, but we also need a compact setup that will draw its power entirely from the ZMOD. The aim is to keep the current draw below that available from the USB104 when powered over USB so that entire chain is power from whatever DAQ device we use to power the USB104.

On a related note, it looks like there are limitations on which pins we can choose on the ZMOD connector to adhere to the SYZYGY specification: particularly that pins need to be utilised sequentially. If we have 5 signals as LVDS pairs and 3 single-ended, I'm assuming that means our differential pairs must be on pins 5 to 15 and then pins 14, 16 and 17 have to be utilised for the single-ended signals. Since 3 of the LVDS pairs are clock signals, is it necessary for the USB104 to use the specific Carrier-to-Pod differential pair (pins 34+36) for these? This would mean skipping out some 20 pins which goes against the SYZYGY spec. 

Also, is the SYZYGY EEPROM needed in order for the USB104 to communicate with a ZMOD daughterboard? According to the SYZYGY spec an EEPROM is needed to store some configuration data, including the current and voltage requirements of the ZMOD daughterboard. What happens on the USB104 if this isn't present? If its essential, is it possible to programme this EEPROM as part of the USB104 start-up cycle or when the ZMOD daughterboard is connected, or does it have to be programmed prior to connection?

[zygot]

I strongly urge you to go to Opal Kelly's website and download the specifications for SYZYGY and SYZYGY DNA. This explains how to design SYZYGY compliant carrier boards and pods. They even have some (old) KiCAD templates.

While the SYZYGY standard provides rules for how to design compliant boards, there is considerable room for making design choices that might limit what you can do with the interface. This is particularly true for carrier board voltage supplies, FPGA pin assignments etc. This is why you need to understand the specifications before doing the analysis of any particular SYGYGY carrier board to see it meets your requirements.

With respect to differential signalling, SYZYGY pins 5-20 can be either single-ended or differential; i.e. pins 5:7 being the _p/_n pair for differential signal D0, or they could be two single-ended signals. Those are the logic signals available for differential signalling. In the FPGA world clocks are different than logic signals and have their own infrastructure. The SYZYGY specification supports 2 differential clock signals. Pins 33:35 are for a clock generated on the pod and being received by the carrier board. Pins 34:36 are for a clock driven by the FPGA on the carrier board and being received on the pod. Again, clocking can be single-ended but for Series7 FPGA devices not every IO pin can connect to the clocking infrastructure of the FPGA. Any of the pin pairs 5-20 could be used as clock signals that are generated on the carrier board. Any standard has to have some flexibility as there are a lot of possible applications that can be accommodated by a standard. For FPGA designs, the FPGA devices have their own rules, limitations, and quirks to understand and deal with.

Do read the DNA specification to understand what the uC and EEPROM do and how they can be utilized. This is particularly important for the carrier board which generally supplies power voltages and in most importantly Vccio IO bank voltages necessary to implement a specific IOSTANDARD. Even still, there is considerable room for customization regarding DNA negotiation and accessing EEPROM data. Digilent designed boards are unique with thier implementation for the Eclypse-Z7. The USB104 is not a Digilent designed board.

With respect to how you design a power supply on a system level, I'll just say that picking a carrier board and trying to adapt that to your needs is not likely to be a satisfactory path. Unfortunately, there are not a lot of SYZYGY carrier boards to choose from. If you stick to powering your pods separately, except for the Vccio rails, you have a good chance of getting to where you want to be. If you intend to use the USB power supply to power the USB104 as well as your pod, then you are in for a rough ride. Older USB 2.0 only allows for 500 mA @5V. Type C USB allows for the ability of a USB host to supply much more power to a USB downstream device, though there's no guarantee that any particular device supports this by design. USB is a whole other thing to know about. Edited February 23 by zygot

[JColvin]

I just want to clarify that the USB104 A7 is a Digilent designed board, but the PC/104 form factor that it uses is, of course, not Digilent designed.

Regardless, the specifications for both SYZYGY and the SYZYGY DNA will be the one of the most valuable resources in your endeavor to create a pod as relying on word of mouth is always susceptible to (unintended) misinterpretation. Opal Kelly also has some additional information in their Design Guide(s), https://docs.opalkelly.com/resources/syzygy-design-guide/, that you may find helpful as well as it addresses some of the questions you had (such as does the pod need have have its MCU pre-programmed).

To be clear, to my knowledge, the SYZYGY details that zygot provided are accurate. But it's still prudent to verify for yourself before investing time and money into developing a new product.

Thanks,
JColvin