Zybo and External JTAG Debugger

[Chithambaram Veerappan]

Hi All

First post here and a novice using Vitis and Vivaldo. 

We have a Zybo (possibly a Z7, not sure as colleague bought it) which we are developing future device on. We have also developed dedicated/custom hardware for this future device. 

Thus far we have been using the onboard JTAG connection and this has worked well. Our future device only has a JTAG connection and not the combined FTDI USB UART/JTAG combo that is on the Zybo.

As a first stage I would like to get an external JTAG Debugger working with the Zybo board. We have bought the WaveShare JTAG programmer/debugger from Amazon. 

I have disconnected the USB connection from the Zybo and connected the WaveShare. The WaveShare is seen by Windows Device Manager as a 'Programming Cable' --> 'Xilinx USB Cable'.

I am now struggling to get Vitis to use this to program/debug the Zybo. It sometimes programs the FPGA, but mostly not. When it does, it does break on 'main' in my application, however I am then not able to step or do anything. It looks like it is only 'half' seeing the device. 

It looks to me that I am missing a driver or missing a step somewhere. It looks like the Hardware Server Agent is not seeing this device. 

I am using Vitis and Vivaldo 2022.1.

Any thoughts or clues?

Thank you in advance

Anand

[JColvin]

Hi @Chithambaram Veerappan,

A Zybo Z7 will have a silkscreen labeling of "Zybo Z7" and only HDMI ports (the original Zybo had a VGA connector), but I doubt that will be relevant here.

I am not familiar with the WaveShare JTAG module, but it looks to be based on (or maybe is) the original Xilinx Platform USB Cable, which might be compatible with the PS_POR_B pin on Zynq devices for the processor via the listed Halt pin, but I am not certain. This seems like the most likely culprit considering that you are having difficulties getting it to configure the ARM core processor side.

This thread was for a different JTAG programmer, but you might have some luck following the recommendations in there:

Thanks,
JColvin

[Chithambaram Veerappan]

Hi JColvin

Thanks for your suggestions. I skimmed the thread that you suggested. I think I have already tried some of what has been posted. 

I ended up giving up on getting the WaveShare to work with the Zybo and when straight to the connecting it to our custom platform, which works, which is the end goal anyway.

My gut feels that it should work using an external JTAG as the port is provided on the Zybo after all. However I think there maybe something on the blank Page 8 of the Schematics that we may need to know in order to get it working - although this is only a guess on my part. 

Thanks

Anand

[JColvin]

Hello,

Realistically, there won't be anything helpful in this particular regard. The connection from the external JTAG J13 to the FPGA is shown on page 9 of the schematic: https://files.digilent.com/resources/programmable-logic/zybo-z7/zybo-z7-d1-sch.pdf.

I had blanked on the fact that because you are using an external debugger that you would be using the external JTAG port, which does not provide access to the PS_POR_B pin which is needed for resets; this is explained in a bit more detail in the Zynq Technical Reference Manual from AMD, UG585: https://docs.xilinx.com/r/en-US/ug585-zynq-7000-SoC-TRM.

Let me know if you have any questions.

Thanks,
JColvin

[Chithambaram Veerappan]

HI JColvin

Thanks for the info. I may be being silly, but if the external JTAG port does not provide access to the PS_POR_B pin which is needed for resets, what is the point of the external JTAG Port being on the board in the first place?

Thanks

Anand

[JColvin]

Hello,

Your question is valid.

I asked one of the hardware engineers to see if there was some insight that I was missing, but they let me know that the 6-pin external JTAG header is purely as a backup option. You can still load bitstreams/.bins from the Vivado Hardware Manager as well as applications from Vitis (I loaded an HDMI example onto a Zybo-Z7 via a JTAG HS2 just now) but you still don't have direct access to UART nor the PS_POR_B pin for processor resets.

Let me know if you have any questions.

Thanks,
JColvin