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Zybo Z7 MIPI Common Mode Voltage question


thirtyy

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Hi

I am interested how MIPI common mode voltage agrees with FPGA common mode requirements? On the scope seems that CM voltage is 100 mV (attached picture, measured at 100 ohm differential). But on the Xilinx documentation seems that minimum is 0.3V.

In theory on 150 ohm this should be 300 mV diff and 150 mV common mode, still too low.obraz.png.8383b0bae16bd098aecaf61a52fe9eb0.png

obraz.png.9ce25a0800af83e184751bfbbbbbf04a.png

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Hi @thirtyy,

My understanding is that as per the Zybo Z7 Reference Manual, https://digilent.com/reference/programmable-logic/zybo-z7/reference-manual#pcam_port, Digilent implemented the MIPI connector based the guidelines described in this Xilinx Application note: https://docs.xilinx.com/v/u/en-US/xapp894-d-phy-solutions.

I have reached out to some engineers a bit more familiar with the hardware implementation for their insight into your query (though with the holiday timeframe, it may be awhile till I hear back).

Thanks,
JColvin

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On 12/20/2023 at 1:45 AM, JColvin said:

Hello,

It was pointed out to me that the XAPP894 mentions that if external termination is used (which the Zybo Z7 uses the style shown in Figure 11), the common mode voltage can drop to 100 mV, which is what you are measuring.

Let me know if you have any questions.

Thanks,
JColvin

Thank you very much, this is exactly what I wanted

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