I am interested how MIPI common mode voltage agrees with FPGA common mode requirements? On the scope seems that CM voltage is 100 mV (attached picture, measured at 100 ohm differential). But on the Xilinx documentation seems that minimum is 0.3V.
In theory on 150 ohm this should be 300 mV diff and 150 mV common mode, still too low.
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thirtyy
Hi
I am interested how MIPI common mode voltage agrees with FPGA common mode requirements? On the scope seems that CM voltage is 100 mV (attached picture, measured at 100 ohm differential). But on the Xilinx documentation seems that minimum is 0.3V.
In theory on 150 ohm this should be 300 mV diff and 150 mV common mode, still too low.
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