Whether Power Sequencing for Eclypse Z7 is done automatically ?

[Jerin James]

We are using Eclypse Z7 board. Want to understand how power sequencing is done. In the Reference manual mentioned like, Configuration is preserved by the PMCU in an EEPROM when the Eclypse's power is cycled. Do we need to do any configuration from user side for controlling Bank voltages. etc.

[artvvb]

Hi @Jerin James

The PMCU handles configuring the adjustable voltage rails as the board is powered on. After powerup, the PMCU can be communicated with to change settings if necessary and to do things like control fan speed. If SYZYGY pods with DNA are installed, the PMCU reads out their power requirements and uses that to configure the supplies appropriately - in this case, no changes are necessary. If SYZYGY pods are installed that do not have DNA, their power rails will not be turned on, and the decutil/dpmutil utility will need to be used to set the voltages for relevant VIO supply groups.

Thanks,

Arthur

[Kishore Kumar1]

what is meant by " SYZYGY pods with DNA are installed" ? do we need to add any specific things in vivado projects, our design just maps the pins as per SYNZY connector details on board. 

[artvvb]

DNA refers to an EEPROM on the daughter board connected to the Eclypse via I2C. If it exists - which it does for all Zmods - then the PMCU will read it before the Zynq is up and running. Mentioning pods without DNA was only intended to cover a case where a custom pod was in development and the EEPROM for it hadn't been added to a prototype yet, or its contents were still being worked out.

[Kishore Kumar1]

so in this case i assume we no need to do anything in FPGA ? Also i dont see EEPROM is existing's as per schematics. we need 1.8 v on bank 34, Please suggest what steps we need to do here in FPGA design point of view as well board bring up point of view? 

[Jerin James]

@Arthur, Is it possible to set up a meeting with you or any Digilent technical support team to clarify our doubts on Eclypse Z7 board bring up?

[zygot]

Anyone with questions about the SYZYGY standard or how it works should go to Opal Kelly's website and download the appropriate documents. I see that today, they require agreeing to terms of a license to do so. There's a SYZYGY document and a  SYZYGY DNA document covering the hardware and carrier board/ pod negotiation sequence. Don't even think about creating your own SYZYGY pod without doing this first.

Before trying to understand how Digilent implements their version of SYZYGY, it would help if you understood what it is. Then you might be in a position to ask good questions about Digilent's PMCU implementation. As far as I know, Digilent doesn't provide sourcec code for PCMU functionality.

Edited December 18, 2023 by zygot

[artvvb]

13 hours ago, Kishore Kumar1 said:

so in this case i assume we no need to do anything in FPGA ?

Use the Zynq preset from the board files (which contains various required information like clock frequencies) and use a controller in the design IP for the pods you want to install (potentially required to get the pods initialized, but not required to power on the board). Following this guide will get you through the basic setup for the host board: https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi.

13 hours ago, Kishore Kumar1 said:

Also i dont see EEPROM is existing's as per schematics. we need 1.8 v on bank 34

DNA is located on the pods/Zmods. In the case of the Zmod scope, this is implemented in an ATtiny MCU: https://digilent.com/reference/zmod/scope/reference-manual#mcu.

[Jerin James]

if the SYZYGY PODs are not present on both connector side, How to control VADJA and VADJB from platformMCU present in the Eclypse Z7 board?

[Jerin James]

As per this figure from Eclypse Z7 manual, does it contain SYZYGY PODs with MCU where DNA information is stored?

[artvvb]

I'm not sure if I understood your question - a SYZYGY pod is a separate physical PCB from the Eclypse baseboard, and is mounted on top prior to the board powering on. If no pods are present, there is no DNA, and the VADJA and VADJB rails aren't enabled by the PMCU, as they aren't used to power anything on the baseboard other than FPGA banks that aren't used when there are no pods present. The diagram from the manual refers to DNA located on pods connected to the corresponding Zmod ports - the I2C bus passes through the SYZYGY connectors.

[Jerin James]

Facing issues with dpmutil integration with petalinux 2023. We have gone through Eclypse-PMCU-Specification-Public pdf. As per our understanding we can check VADJs status and override values with I2C also using configuration registers. Same functionality as dpmutil/decutil. Is this understanding is correct ?

[artvvb]

To the question on I2C, yes. The dpmutil sources are just a wrapper around the PS I2C controller that abstracts I2C communication with the PMCU and DNA. You could reimplement the same functionality with an alternate driver for the PS I2C device. I have minimal personal experience with Petalinux, and am not certain exactly what configuration needs to happen, but at a minimum, the expected PS I2C needs to be enabled with access to the xiicps driver. Reviewing the I2CHAL implementation may be helpful: https://github.com/Digilent/dpmutil/blob/master/I2CHAL.c - it looks for an I2C driver with the device name pmcu-i2c or defaults to /dev/i2c-0.

[Jerin James]

We are able to write and read back PLATFORM_CONFIGURATION(0x8004) register using i2c commands  

But facing issues with VADJ_A_OVERRIDE 0x804E. Like write is happening (Tried 0xC000), but while reading getting values always as 0x00. 

Any idea on this?