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What will be the qspi image offsets



I am trying to generate the BOOT.BIN image for QSPI flash in to zybo z7 10 board , by using the following command and i have the following images 1. image.ub - 7.7MB, 2. u-boot.elf - 7MB, 3. zynq_fsbl.elf - 452kb, 4.boot.scr - 2.8kb, 5. system.dtb - 18.8kb.

$ petalinux-package --boot --format BIN --fsbl /home/vinod/workspace/zybo1/images/linux/zynq_fsbl.elf --u-boot --kernel

While i am running the above command, ia ma getting the 

INFO: Getting system flash information...
INFO: File in BOOT BIN: "/home/vinod/workspace/zybo1/images/linux/zynq_fsbl.elf"
INFO: File in BOOT BIN: "/home/vinod/workspace/zybo1/images/linux/u-boot.elf"
INFO: File in BOOT BIN: "/home/vinod/workspace/zybo1/images/linux/system.dtb"
INFO: File in BOOT BIN: "/home/vinod/workspace/zybo1/images/linux/boot.scr"
INFO: File in BOOT BIN: "/home/vinod/workspace/zybo1/images/linux/image.ub"
INFO: Generating zynq binary package BOOT.BIN...

****** Xilinx Bootgen v2022.1
  **** Build date : Mar 30 2022-09:29:13
    ** Copyright 1986-2022 Xilinx, Inc. All Rights Reserved.

[ERROR]  : Section image.ub.0 offset of 0x7E0000 overlaps with prior section end address of 9C0B00
ERROR: Fail to create BOOT image
* My QSPI/OSPI image offsets are as followed 

 (0xA00000) QSPI/OSPI Kernel offset                                                  
 (0x600000) QSPI/OSPI Kernel size                                                                   
(0x1000000) QSPI/OSPI Ramdisk offset                                                       
(0xF80000) QSPI/OSPI Ramdisk size                                                                     
(0xA80000) QSPI/OSPI fit image offset                                                             
(0x1500000) QSPI/OSPI fit image size                                                              
 * What will be the offset settings please help me 


Screenshot from 2023-11-15 15-34-59.png

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You are looking for something like this: https://support.xilinx.com/s/article/1276990?language=en_US

Instead of creating a zynqMP project you already have a zynq project.
for zynq you will not have pmufw.elf and bl31.elf files.
the process is mostly the same. However you have to take in to account the size of qspi for your zynq board.
You may also skip --fpga flag for petalinux-package to avoid packing the bitstream however no PL in that case.

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