Eclypse-Z7: PMOD I2C

[connoisseur_de_mimi]

I want the PS to be able to communicate with I2C sensors via the PMOD interfaces, while other pins of the PMOD are in use by the PL.

I added the AXI IIC IP to my design and use a Utility Buffer IP (set up as IOBUFDS) to implement the I2C Open Drain interface:

The Package Pins are constrained:

set_property -dict { PACKAGE_PIN D15 IOSTANDARD LVCMOS33 } [get_ports { i2c_scl_ch1 }]; #IO_L1N_T0_AD0N Sch=ja3_fpga
set_property -dict { PACKAGE_PIN E16 IOSTANDARD LVCMOS33 } [get_ports { i2c_sda_ch1 }]; #IO_L1P_T0_AD0P Sch=ja4_fpga

[...]

set_property -dict { PACKAGE_PIN D17 IOSTANDARD LVCMOS33 } [get_ports { i2c_scl_ch2 }]; #IO_L5N_T0_AD9N Sch=jb3_fpga
set_property -dict { PACKAGE_PIN E18 IOSTANDARD LVCMOS33 } [get_ports { i2c_sda_ch2 }]; #IO_L5P_T0_AD9P Sch=jb4_fpga

 

During Implementation, the following errors and critical warnings are generated:

Quote

[DRC NSTD-1] Unspecified I/O Standard: 4 out of 159 logical ports use I/O standard (IOSTANDARD) value 'DEFAULT', instead of a user assigned specific value. This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all I/O standards. This design will fail to generate a bitstream unless all logical ports have a user specified I/O standard value defined. To allow bitstream creation with unspecified I/O standard values (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks NSTD-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: i2c_scl_ch2[0], i2c_sda_ch2, i2c_scl_ch1[0], and i2c_sda_ch1.
[DRC UCIO-1] Unconstrained Logical Port: 4 out of 159 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined. To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1]. NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run. Problem ports: i2c_scl_ch2[0], i2c_sda_ch2, i2c_scl_ch1[0], and i2c_sda_ch1.

[Vivado 12-1411] Cannot set LOC property of ports, Cannot expand macro instance lockin_i/ps_clk/util_ds_buf_i2c_ch1_scl/U0/USE_IOBUFDS.GEN_IOBUFDS[0].IOBUFDS_I ["myproject.srcs/constrs_1/new/afe.xdc":12]
[Vivado 12-1411] Cannot set LOC property of ports, Cannot expand macro instance lockin_i/ps_clk/util_ds_buf_i2c_ch1_sda/U0/USE_IOBUFDS.GEN_IOBUFDS[0].IOBUFDS_I ["myproject.srcs/constrs_1/new/afe.xdc":13]
[Vivado 12-1411] Cannot set LOC property of ports, Cannot expand macro instance lockin_i/ps_clk/util_ds_buf_i2c_ch2_scl/U0/USE_IOBUFDS.GEN_IOBUFDS[0].IOBUFDS_I ["myproject.srcs/constrs_1/new/afe.xdc":30]
[Vivado 12-1411] Cannot set LOC property of ports, Cannot expand macro instance lockin_i/ps_clk/util_ds_buf_i2c_ch2_sda/U0/USE_IOBUFDS.GEN_IOBUFDS[0].IOBUFDS_I ["myproject.srcs/constrs_1/new/afe.xdc":31]

If I set the I/O standard via Implementation -> Schematic -> I/O Ports to LVCMOS33, the constraints file is updated t

set_property IOSTANDARD LVCMOS33 [get_ports i2c_ch1_sda]
set_property IOSTANDARD LVCMOS33 [get_ports {i2c_ch1_scl[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports {i2c_ch2_scl[0]}]
set_property IOSTANDARD LVCMOS33 [get_ports i2c_ch2_sda]

I cannot, however, set the Package Pins for the I2C ports to the Package Pins listed above - the Pins are not in the List, Vivado shows an "invalid placement site" error:

I selected the I2C PMOD pins according to the PMOD Spec.

How can I fix this error? Is this related to the utility buffer output being differential?

Edited October 5, 2023 by connoisseur_de_mimi
added tags

[artvvb]

Hi @connoisseur_de_mimi

Quote

How can I fix this error? Is this related to the utility buffer output being differential?

Yeah, the issue is likely that it's a differential buffer.

Manual instantiation of the IO buffers isn't necessary. You could just make the entire I2C interface external and constrain the two pins. Vivado will automatically add tristate buffers as appropriate. You can also add pullups through an XDC file with "pullup true" constraints like here:

Also, port names for the below screenshot would be "IIC_0_scl_io" and "IIC_0_sda_io".

Thanks,

Arthur

[connoisseur_de_mimi]

Thanks @artvvb, it worked! I also added the Pullup constraint, as suggested (its not needed as my I2C devices have pullups built in, but it should make debugging easier).

 

my constraints are now

Quote

set_property -dict { PACKAGE_PIN D15 IOSTANDARD LVCMOS33 PULLUP TRUE} [get_ports { IIC_ch1_scl_io }]; #IO_L1N_T0_AD0N Sch=ja3_fpga
set_property -dict { PACKAGE_PIN E16 IOSTANDARD LVCMOS33 PULLUP TRUE} [get_ports { IIC_ch1_sda_io }]; #IO_L1P_T0_AD0P Sch=ja4_fpga

set_property -dict { PACKAGE_PIN D17 IOSTANDARD LVCMOS33 PULLUP TRUE} [get_ports { IIC_ch2_scl_io }]; #IO_L5N_T0_AD9N Sch=jb3_fpga
set_property -dict { PACKAGE_PIN E18 IOSTANDARD LVCMOS33 PULLUP TRUE} [get_ports { IIC_ch2_sda_io }]; #IO_L5N_T0_AD9N Sch=jb3_fpga