Genesys 2 HDMI Demo

[DBanks60]

Does anyone know if the Genesys 2 HDMI Demo works with Vivado OEM Kintex-7 FPGA XC7K325T Vivado Design Edition (OEM_7K325T_DesignEd) installed?

[JColvin]

Hi @DBanks60,

I don't have a Design Edition installed, but my understanding is that as long as the Design Edition allows bitstream generation for the correct Xilinx chip (I haven't checked, but I don't think vouchers for Design Editions differentiate between speed grades or something like that), then it should work.

There should not be any additional, paid IP that is required to run the HDMI demo, https://digilent.com/reference/programmable-logic/genesys-2/demos/hdmi.

Let me know if you have any questions.

Thanks,
JColvin

[DBanks60]

15 hours ago, JColvin said:

Hi @DBanks60,

I don't have a Design Edition installed, but my understanding is that as long as the Design Edition allows bitstream generation for the correct Xilinx chip (I haven't checked, but I don't think vouchers for Design Editions differentiate between speed grades or something like that), then it should work.

There should not be any additional, paid IP that is required to run the HDMI demo, https://digilent.com/reference/programmable-logic/genesys-2/demos/hdmi.

Let me know if you have any questions.

Thanks,
JColvin

Thanks https://forum.digilent.com/profile/5-jcolvin/.

We have progressed through the hardware design at this point, and I'm confident that the Design Edition we are using (OEM_7K325T_DesignEd) is working fine, allowing all of the IP to build--we can synthesize, implement, and create bitstream.

We have also been able to run the HDMI demo described in  https://digilent.com/reference/programmable-logic/genesys-2/demos/hdmi.

We're now having issues with the build in Vitis. Looking at https://digilent.com/reference/programmable-logic/guides/vitis-update-hardware-specification, we're getting stuck in that last paragraph:

"Changes to the software application may be required before the application can be built and programmed onto the board, however, detailing what may need to be done is outside of the scope of this guide."

We want to add modules to the hardware design, but when we do, everything works fine on the Vivado side, but on the Vitis side, when we Update Hardware Specification and then try to build the videodemo_system, we get errors.

I believe that the errors happen because Vitis is not updating correctly. When I compare the previously working workspace to the new one, there are header files that disappear.

I see posts on online forums that addressed this issue in the past, involving modifying or resetting BSP, but none of those efforts to fix this issue are working for me now.