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Cannot program flash with the bootloader image


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Hi,

I have encountered a problem programming the flash of my CMOD A7 35T with the bootloader image, so that the FPGA would automatically configure itself after power on. 
Briefly, I placed my project (through its linker script) into the SRAM CELLS of the board and I programmed the flash with the SREC of the project. Now, if I program the FPGA with the bootloader elf (placed into the BRAMs), it works fine (the bootloader actually moves the program data from flash to the SRAM CELLS). But if I try to program the flash with the download.bit (created with "Program Flash" and the bootloader .elf) it doesn't do anything. I followed these guides: 

https://reference.digilentinc.com/learn/programmable-logic/tutorials/htsspisf/start

http://www.xilinx.com/support/answers/64238.html

http://www.xilinx.com/support/answers/63605.html

I also created a .mcs file with both the download.bit (FPGA config file) and the project SREC) with this TCL command in Vivado:

write_cfgmem -format mcs -size 4 -checksum FF -interface spix4 -loaddata "up 0x0 /path/to/download.bit up 0x00C00000 /path/to/peripheral_test.srec" -force peripheral_test

but it didn't work. 

I really need to write the FPGA config file toghether with the bootloader image to the flash. How can I solve this problem?

Thank you in advance,
Antonio Daril Crispino

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Let me understand what you are up to: You have a project that works when configured from JTAG, and it even loads the code from the flash, but when you try to get both program code and configuration onto the flash at the same time ... that's when your program fails?

Be aware, that to change the flash you need to erase the flash.  Erase operations can undo large sections of flash memory.  Hence, if you wish to get both bootloader, program, and configuration all on the flash at once, you may find that you need to place all these pieces onto the flash at the same time--lest one of the pieces needs to erase a shared section of the flash just to get its code on.

Dan

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First of all, thanks for the answer. Yes, I know that and, in fact, I also created a .mcs file with both configuration and code with the TCL command above, following this guide:

http://www.xilinx.com/support/answers/63605.html.

In particular, I used this command: 

write_cfgmem -format mcs -size 4 -checksum FF -interface spix1 -loaddata "up 0x0 C:/.../.../Desktop/download.bit up 0x300000 C:/.../.../Desktop/peripheral_test.srec" -force C:/.../.../Desktop/peripheral_test

since my flash is Micron N25Q032A with a size of 32 Mb (4 MB ) and I configured the flash in standard mode. Moreover, I don't understand why the  created .mcs file is a 6MB file, while I specified a 4 MB size. What am I doing wrong? 

 

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Let me just make a quick comment here so that this thread comes back up and doesn't get lost.  I know youv'e posted since, but I haven't seen any posts addressing your problem.  Sadly, I'm not much of a microblaze type, so let's hope someone with more experience pipes up to help.

I will say that this flash device is ... more complicated to work  with than the Spansion flash devices found on many other boards.  I've seen this Micron flash part on the newer boards, and just recently wrote a controller for it.  Unlike the other flash devices, though, this one has some non-volatile settings (and even some volatile ones) that can place the flash in a difficult state for a controller to recognize and work with.  (This made debugging the controller a real ... pain.)  If you are interested in what I'm referring to, you might want to Google the spec sheet and look up XIP.  Because of this, you might find that powering the flash down and back up can help if it isn't responding properly. 

I know that, were this a problem I was struggling with, I'd try to get a configuration running on the FPGA which I could then use to query and interact with the flash.  I'd then want to look at what parts of the flash were properly set, and which parts were not.  This is what I did with the Arty, a very similar board--with the same FPGA, UART comms, and QSPI controller.  However, since I don't have the CMod S7, I can't really offer code to you that would do what you need.

Sorry.  :(  Let's see if we can get a Digilent employee who knows the answer to join the conversation.

Dan

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Hello D@n and Antonio,

Sorry for the late response, we have been looking into this issue.  We are thinking that the issue is the 4MB of quad spi flash. We are looking into compressing files to deal with this issue and should have something for you soon.

thank you,

Jon

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Thank you all for your answers. After several tries, I found that the problem was that I put this command in the xdc file:

BITSTREAM.CONFIG.SPI_32BIT_ADDR (Enable SPI 32-bit address style: NO, YES)

I found that it instructs the SPI configuration logic to issue 4-byte addressing commands and that it works only with SPI flash densities of 256 Mb or larger. Since I have a 32Mb flash it didn't work. 

Just deleting this command the flash now works and I am able to configuring the FPGA with the bootloader through the flash.

Thank you again,
Antonio

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Antonio,

 

For larger projects it may also be necessary to compress the size of your bitstreams in order for them to fit properly in flash given that you only have 4 MB worth on the Cmod A7. I have updated the "How To Store Your SDK Project in Flash" tutorial to provide instructions on how to do so.

 

Mikel

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Antonio,

 

What I meant by "larger projects" was strictly bitstream and ELF file sizes. I am not 100% certain but I don't think you can increase your heap and stack size larger than the amount of local memory that you specified when you ran the block automation for MIcroblaze in your Vivado design. The heap and stack are for use at run time and have nothing to do with flash memory. How much are you trying to increase your stack and heap by?

 

Mikel

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Hi Mikel,

I don't think what you said is totally correct. I have an old project in which the amount of local memory of the microblaze is 16k and the heap and stack size are 15MB each, placed both on an LPDDR through the linker script of the application.

Now I have a 32k local memory and I want to set heap and stack memory at some MB, say 1 or 2, in a 64MB (set through the address editor in Vivado) External Memory Controller (EMC). The application works fine with 800k for both heap and stack. I know that increasing heap and stack sizes does not affect the size of the ELF file, but the application doesn't work. Do you have any idea about how I can increase these memories? Has it anything to do with the address editor in Vivado? Should I change the addresses of the EMC to make it work?

Thank you for your time,
Antonio

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