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JTAG HS3 Pinout


Jennifer Yan

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Hi @Jennifer Yan,

The PS_SRST_B is present to allow the Xilinx Tools to reset the processor during debug operations through the dedicated pin on the Zynq processor: https://digilent.com/reference/programmers/jtag-hs3/reference-manual#xilinx_zynq-7000_and_soc_support. Xilinx provides a bit more information about this pin here: https://docs.xilinx.com/r/en-US/ug585-zynq-7000-SoC-TRM/External-System-Reset-PS_SRST_B.

If you are not using a Zynq device, then you can leave this pin as a no-connect or implement a weak pull-up, 100k ohm, to keep it from floating.

Let me know if you have any questions.

Thanks,
JColvin

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