HS2 OpenOCD SWD_EN

[Joshua Nekl]

Which HS2 FTDI GPIO pin controls tri-state of the TMS pin?

We have successfully connected the Digilent HS2 to our device with OpenOCD using the JTAG interface. We would like to change the transport to the 2-wire SWD interface. To do this, we need to define a SWD_EN signal which is used to drive or tristate the SWDIO (aka TMS) pin. 

https://openocd.org/doc/html/Debug-Adapter-Configuration.html

ftdi_layout_signal SWD_EN -data mask

"The masks are FTDI GPIO register bitmasks to tell the driver the connection and type of the output buffer driving the respective signal. data_mask is the bitmask for the pin(s) connected to the data input of the output buffer."

[JColvin]

Hi @Joshua Nekl,

I asked the design engineer about this and they let me know that ADBUS5 is the tri-state buffer enable for TMS.

Let me know if you have any questions.

Thanks,
JColvin

[Joshua Nekl]

Still unsuccessful after several attempts.

 

Based on https://github.com/openocd-org/openocd/blob/master/tcl/interface/ftdi/ft232h-module-swd.cfg, I tried all combinations of

ftdi layout_signal SWD_EN -data 0
ftdi layout_signal SWDIO_EN -[n]data 0x20 

I was unable to get past "Error: connecting DP: cannot read IDR"

Schematics would be very helpful, but based on previous posts I don't expect them to be shared.

Is the TMS output enable active high or low?

If there are buffers to isolate the FTDI chip from the external interface due to different voltage levels, I expect the TMS input to be routed to a different input pin on the FTDI chip. Since I've seen HS2 drivers for cJTAG I expect this connectivity exists. I don't need complete schematics, but the connectivity between the FTDI chip and external interface would be extremely helpful.

[JColvin]

Hi @Joshua Nekl,

The TMS Output Enable is active high as are the rest of signals.

Regarding your last question, there are a pair of multiplexors on the JTAG HS2.

SEL_TMS on ACBUS6 dictates what is connected to the TMS tri-state buffer: TMS (0) or TDI (1)
SEL_TDO on ACBUS5 dictates what is connected to the TDO input pin of the FTDI chip: external TDO pin (0) or external TMS pin (1)

It is up to the end user to not induce a drive conflict on TMS.

Thanks,
JColvin

[Joshua Nekl]

Thanks, I was able to configure OpenOCD digilent-hs2.cfg to support ARM SWD with the following

ftdi layout_signal SWD_EN -data 0x6000
ftdi layout_signal SWDIO_OE -data 0x20

[Joshua Nekl]

Another related question ...

 

When using SWD, TCK becomes SWCLK and TMS becomes SWDIO; the TDI and TDO pins are now unused. 

It is common to multiplex the ARM single pin Serial Wire Trace Viewer (SWV/SWO) onto the now unused JTAG TDO pin. 

According to the OpenOCD FTDI source 
https://openocd.org/doc-release/doxygen/ftdi_8c.html

Quote

 

JTAG uses only one of the two communications channels ("MPSSE engines") ...

..., the additional channels can be used for a variety of purposes, ...

On systems which support ARM's SWD in addition to JTAG, or instead of it, that second port can be used for reading SWV/SWO trace data.

 

Is the external TDO input only connected to the mux for the FTDI.CHA.TDO input, or is there also control ability to connect it to the FTDI.CHB.TDO input?  

[JColvin]

Hi @Joshua Nekl,

The external TDO input is only connected to the one input mux, so there is only the FTDI.CHA.TDO input.

Thanks,
JColvin