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NetFpga SUME


Leo_W

Question

I had a piece of SUME that shorted out and couldn't start, and now it's finally fixed and can be switched on. Power on as described in the WIKI, the Power LED (LD10) and DONE LED (LD4) light up immediately. But the UART interface does not have any information printed out. This program seems to be built in and it is not known how to get SUME to re-run this program.
I wrote a key lighting program to test, FPGA chip is normal.

Please tell me where I can download the program?

image.png.979694067511d915e7ee50dc5bc2e9b2.png

image.thumb.png.0bc5d03227086277eb54b8651de4cb14.png

Thanks!

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Hi @Leo_W,

I believe you contacted Digilent via your distributor which we separately responded to earlier today, but I would like to ask how you resolved the shorting out issue so that way Digilent can better understand what happened and how we might help other SUME users in the future.

In terms of testing the SUME, you should be able run the Acceptance Test Project that is developed and maintained by the NetFPGA SUME group: https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Acceptance-Test-Project.

Though it also sounds like from "I wrote a key lighting program to test, FPGA chip is normal.", that you have already confirmed the SUME can be configured and is working. Is my understanding correct?

I have asked about the Production Test and will let you know when I learn more.

With regards to responding, we can continue troubleshooting either here or through the distributor, though I would ask that only one channel is picked in order to help streamline the flow of information.

Thanks,
JColvin

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On 7/29/2023 at 2:17 AM, JColvin said:

Hi @Leo_W,

I believe you contacted Digilent via your distributor which we separately responded to earlier today, but I would like to ask how you resolved the shorting out issue so that way Digilent can better understand what happened and how we might help other SUME users in the future.

In terms of testing the SUME, you should be able run the Acceptance Test Project that is developed and maintained by the NetFPGA SUME group: https://github.com/NetFPGA/NetFPGA-SUME-public/wiki/Acceptance-Test-Project.

Though it also sounds like from "I wrote a key lighting program to test, FPGA chip is normal.", that you have already confirmed the SUME can be configured and is working. Is my understanding correct?

I have asked about the Production Test and will let you know when I learn more.

With regards to responding, we can continue troubleshooting either here or through the distributor, though I would ask that only one channel is picked in order to help streamline the flow of information.

Thanks,
JColvin

Because the fan of the ATX power supply stopped when the power was powered on, I judged that it was the short circuit of the power supply part, so I replaced the chip one by one through the elimination method, and finally found that Q27 and Q28 were faulty.image.png.084aa8f33947b79b84574b23f57c3557.png

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