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Set a trigger in record mode with python


Mathias G.

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Hi !

I want to set a trigger to start the acquisition in record mode, I use all 4 channels and the trigger is on the pin trigger 2 (the trigger 1 is an external clock). 

That's my code but it doesn't work, have I forgotten anything ?

#set trigger
dwf.FDwfAnalogInTriggerAutoTimeoutSet(hdwf, c_double(0)) #disable auto trigger
dwf.FDwfAnalogInTriggerSourceSet(hdwf, 12)
dwf.FDwfAnalogInTriggerConditionSet(hdwf, 0)

dwf.FDwfAnalogInTriggerLevelSet(hdwf, c_double(1.5)) # 1.5V
 

test_record_pattern_4bits.py

Edited by Mathias G.
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22 hours ago, attila said:

Hi @Mathias G.

What is the frequency of the external clock you use?

Using your script I've connected the following and it seems to be working.
DIO 11 to Trig1
DIO 9 to Trig2
DIO 5 to C1

image.png

image.png

Hi @attila !

Currently, I generate a clock with the pattern generator (in the code, it is the pinClock). The problem is that the program starts the acquisition without waiting the condition of trigger. I tried disconnecting the cable I use as a trigger and disabling the auto trigger and I didn't get a message telling me that the AD is waiting, and the acquisition has started. 

I made few modifications in the code to try and one thing is to use the channel 4 as detector because it has a periodic signal on 9 samples. As you can see, on the pictures, if I made two (or more) acquisitions I didn't have the same result. (I just try to change the analogIntriggersourceset value, from trigsrcDetectorAnalogIn to trigsrcAnalogIn but nothing change).

image.png.cd913f440dada57e28f86cfca0312c55.pngimage.png.fbe8841cd61c609c8b6ab46fb61572f1.png

test_record_pattern_4bits.py

Edited by Mathias G.
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41 minutes ago, attila said:

Hi @Mathias G.

Are you using a new WaveForms version like 3.20.1 or newer?

I'm getting stable trigger using your code with this.

image.png

Thanks you @attila 

I don't know but I try with another code and that's work as for you ! 

But sorry, I have an another question : Why I have an important time of configuration, which is proportionnal with frequence of the external clock from 100 kHz. (between 2-3 seconds for 100 kHz, 20 seconds for 10 kHz, ...)

 

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4 hours ago, attila said:

Hi @Mathias G.

How many samples do you collect ?

Hi @attila !

I have these two figures that I made myself, I collected 100 samples on 4 channels. (I'm sorry for the language)

Courbe tps en fonction clock externe.pdf Courbe tps en fonction période clock externe 10 - 1000 MHz.pdf

Edited by Mathias G.
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3 hours ago, Mathias G. said:

 

4 hours ago, attila said:

Hi @Mathias G.

How many samples do you collect ?

Hi @attila !

I don't know if I can post three another question here, so I try but if you prefere, I can create a new page.

1 - Can the ADP stop the acquisition if it exceeds 70°C ? Today, I have a bug few times, and each times the ADP is relatively warm.

2 - Can I get the frequency of the external clock that I use as source for the oscilloscope ? (It's connected to the trigger 1)

3 - I have a delay equivalent to 4 tick when I acquire more than 320 samples, why?

 

For the first question, the ADP block (bug) at this step (precisely it's when I do the AnalogInStatusRecord function) so I have to interrupt by myself.

image.png.ca63d23bcbb7ec311a4792a3f0131f0b.png

Edited by Mathias G.
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1 hour ago, Mathias G. said:

 

Hi @attila !

I don't know if I can post three another question here, so I try but if you prefere, I can create a new page.

1 - Can the ADP stop the acquisition if it exceeds 70°C ? Today, I have a bug few times, and each times the ADP is relatively warm.

2 - Can I get the frequency of the external clock that I use as source for the oscilloscope ? (It's connected to the trigger 1)

3 - I have a delay equivalent to 4 tick when I acquire more than 320 samples, why?

For the third question, I found that putting an offset of 50% erases the problem, but why ?

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Hi @Mathias G.

1. The temperature measurement is for the Zynq (CPU+FPGA), the hottest part of the device, which should be fine up to 85*C

The AnalogInStatusRecord function is not doing to much, it should not block. This simply calculates and returns the sample statistics based on the last two FDwfAnalogInStatus calls which communicate with the device.

2. In your script Trigger2 is set to the be sampling clock, FDwfAnalogInSamplingSourceSet trigsrcExternal2(12) change it to trigsrcExternal1(11) to be Trig1 (closer to the edge of the device).
Isn't the long "time of configuration" caused by this ? the sampling frequency is not what you expected to be, trigger pulses are being used for clocking

The undocumented analog-io 15/2 returns the trigger1 frequency. I've added this to use for some automated adjustment from the app, but it is not yet used.
dwf.FDwfAnalogIOStatus(hdwf)
dwf.FDwfAnalogIOChannelNodeStatus(hdwf, 15, 2, byref(hzTrig1))

3. The next software version will correct the (+/-10..20) sample trigger delay for external sampling clock.

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30 minutes ago, attila said:

Hi @Mathias G.

1. The temperature measurement is for the Zynq (CPU+FPGA), the hottest part of the device, which should be fine up to 85*C

The AnalogInStatusRecord function is not doing to much, it should not block. This simply calculates and returns the sample statistics based on the last two FDwfAnalogInStatus calls which communicate with the device.

2. In your script Trigger2 is set to the be sampling clock, FDwfAnalogInSamplingSourceSet trigsrcExternal2(12) change it to trigsrcExternal1(11) to be Trig1 (closer to the edge of the device).
Isn't the long "time of configuration" caused by this ? the sampling frequency is not what you expected to be, trigger pulses are being used for clocking

The undocumented analog-io 15/2 returns the trigger1 frequency. I've added this to use for some automated adjustment from the app, but it is not yet used.
dwf.FDwfAnalogIOStatus(hdwf)
dwf.FDwfAnalogIOChannelNodeStatus(hdwf, 15, 2, byref(hzTrig1))

3. The next software version will correct the (+/-10..20) sample trigger delay for external sampling clock.

Thanks you @attila

I gonna check the SW version, and I had already modified oscilloscope source in External 1 and the trigger on external 2. (That's my actual code)

Error with AIStatusRecord happens only when I set a low number of samples (by example 32) and I have the trigger on. I tried and I gonna try many setup with different number of sample then different trigger delay and length of acquisition (both make that works sometimes and sometimes not so I can't say why).

Update : Now the device update is done (I was at the 3.19.1 or .2 ... )

AnalogIn_record_test_4bits_vidor.py

Edited by Mathias G.
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2 hours ago, attila said:

Hi @Mathias G.

1. The temperature measurement is for the Zynq (CPU+FPGA), the hottest part of the device, which should be fine up to 85*C

The AnalogInStatusRecord function is not doing to much, it should not block. This simply calculates and returns the sample statistics based on the last two FDwfAnalogInStatus calls which communicate with the device.

2. In your script Trigger2 is set to the be sampling clock, FDwfAnalogInSamplingSourceSet trigsrcExternal2(12) change it to trigsrcExternal1(11) to be Trig1 (closer to the edge of the device).
Isn't the long "time of configuration" caused by this ? the sampling frequency is not what you expected to be, trigger pulses are being used for clocking

The undocumented analog-io 15/2 returns the trigger1 frequency. I've added this to use for some automated adjustment from the app, but it is not yet used.
dwf.FDwfAnalogIOStatus(hdwf)
dwf.FDwfAnalogIOChannelNodeStatus(hdwf, 15, 2, byref(hzTrig1))

3. The next software version will correct the (+/-10..20) sample trigger delay for external sampling clock.

 

Can I have a beta test version with problem of (+/-10..20) sample trigger delay for external sampling clock resolved or that's not possible ?

Maybe, you have already test the code I posted before, because now I can't get anything to synchronize at all. (I don't remember changing any parameter other than the triggerpositionset or the number of samples, so the problem is either there or in the software, perhaps).

Edited by Mathias G.
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1 hour ago, attila said:

Hi @Mathias G.

Here you can find the installer:

See the following example: AnalogIn_SamplingClock.py

image.png

Hi @attila

I have try with your program, I have change the frequency to use the frequency of the external clock (I see later that you have already do it... sorry !) . When I use a low quantity of samples, I think that I have a signal synchronous. But when I take more samples (here 640) you can see, that I have different delays everytime.

Figure 2023-06-23 145608.png

Figure 2023-06-23 145615.png

Figure 2023-06-23 145620.png

AnalogIn_SamplingClock_test_GM.py

Edited by Mathias G.
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2 minutes ago, attila said:

Hi @Mathias G.

I the sample code I sent there was: dwf.FDwfAnalogInFrequencySet(hdwf, hzClock)
It needs this information to compensate ADC and processing delays for correct trigger position.

 image.png

image.png

image.png

Hi @attila

I don't know that we need to set the frequency, I understand the problem ! Thank you !!

Edited by Mathias G.
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