Hi all, I am trying to get my project to boot directly from flash memory, but as requires a lot of BRAM, I am trying to use a bootloader to load up the application and run directly from the DDR memory I have.
If I dont use a bootloader and run my application directly from MicroSD it works fine, but then needs a lot of BRAM and as I want to move this to a smaller FPGA later on a custom board I need to reduce the BRAM utulisation and to do that I need to run from DDR and use a bootloader.
So far I have done the following...
1. Created HW design in vivado with QSPI IP on a 50MHz clock at ext_spi_clk and generated bitstream
2. Created my SW application in vitis and assigned all to DDR
3. Created a new application in vitis for the bootloader and assigned all to BRAM
4. Configured the blconfig.h to look for my application at 0xA00000 (10MB into the 32MB of QSPI)
5. Built all and generated a bootloader.elf as well as my application.elf
6. Generated a download.bit file using my project.bit, project.mmi and bootloader.elf (download.bit size is 9.5MB)
7. Programmed the download.bit file to QSPI via "Xilinx -> Program Flash" at offset 0x0 (no offset)
8. Programmed the application.elf at 0xA00000 as per the definition in step 4
When I do the above I get the info below in the Vitis Serial Terminal:
[quote]SREC SPI Bootloader
FlashID=0x1 0x2 0x19
Loading SREC image from flash @ address: 00A00000[/quote]
Then nothing happens! I assume the bootloader is seeing the flash as it shows a flashID not equal to 0!
I have read back the .bin file from the QSPI device and can see there is data that begins at 0x00A00000 (see image attached), so not sure what is going on, any ideas? Also attached a snippet of how I have the QSPI IP configured.
This is on a Digilent Nexys Video dev board with Artix-7 XC7A200T FPGA.
Question
Mario875
Hi all, I am trying to get my project to boot directly from flash memory, but as requires a lot of BRAM, I am trying to use a bootloader to load up the application and run directly from the DDR memory I have.
If I dont use a bootloader and run my application directly from MicroSD it works fine, but then needs a lot of BRAM and as I want to move this to a smaller FPGA later on a custom board I need to reduce the BRAM utulisation and to do that I need to run from DDR and use a bootloader.
So far I have done the following...
1. Created HW design in vivado with QSPI IP on a 50MHz clock at ext_spi_clk and generated bitstream
2. Created my SW application in vitis and assigned all to DDR
3. Created a new application in vitis for the bootloader and assigned all to BRAM
4. Configured the blconfig.h to look for my application at 0xA00000 (10MB into the 32MB of QSPI)
5. Built all and generated a bootloader.elf as well as my application.elf
6. Generated a download.bit file using my project.bit, project.mmi and bootloader.elf (download.bit size is 9.5MB)
7. Programmed the download.bit file to QSPI via "Xilinx -> Program Flash" at offset 0x0 (no offset)
8. Programmed the application.elf at 0xA00000 as per the definition in step 4
When I do the above I get the info below in the Vitis Serial Terminal:
[quote]SREC SPI Bootloader
FlashID=0x1 0x2 0x19
Loading SREC image from flash @ address: 00A00000[/quote]
Then nothing happens! I assume the bootloader is seeing the flash as it shows a flashID not equal to 0!
I have read back the .bin file from the QSPI device and can see there is data that begins at 0x00A00000 (see image attached), so not sure what is going on, any ideas? Also attached a snippet of how I have the QSPI IP configured.
This is on a Digilent Nexys Video dev board with Artix-7 XC7A200T FPGA.
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