Arty S7 SPI transactions without processor

[jbr555]

Hello all,

I am very new to FPGAs and don't know if what I am trying is doable in a reasonable manner. My objective is to send SPI transactions to flash from JTAG without using Microblaze via the Vivado Tcl consloe. Eventually I want to set password protection on flash sectors after loading a different design, but thought starting with something simpler like reading flash ID would be better.  I am using AXI Quad SPI and JTAG to AXI Master IPs and am able to read and modify the AXI registers, but not getting the expected response from flash. Each command I try to send results in the data receive register filling with all Fs. I don't know if the problem is with the design or the Tcl script I am using (attached). Any help would be greatly appreciated. Thanks.

 

My setup is:

- Arty S7 50 board

- Vivado 2022.2

 

My block design:

 

The output clock from clock wizard is 100MHz. The external ports are all connected using the board file.

JTAG to AXI Master settings:

- AXI4Lite, Address Width = 32, Data Width = 31

 

AXI Quad SPI settings:

test_script.tcl

[jbr555]

Figured it out, had to change the tcl script and constraint file and now it works as expected

[artvvb]

Cheers, thanks for updating. I personally hadn't run across JTAG to AXI master before, it's pretty interesting for this kind of thing. Tried the IP out with a Nexys A7-50T and an AXI GPIO with the following script, and the connection worked fine. Issues in the constraints make sense.

Quote

puts "deleting all axi txns, reset hw_axi_1"
if {[llength [get_hw_axi_txns *]] != 0} {
    delete_hw_axi_txn [get_hw_axi_txns *]
}
reset_hw_axi [get_hw_axis hw_axi_1]

set axi [get_hw_axis hw_axi_1]
set base 0x40000000
set write_led [create_hw_axi_txn write_led $axi -address [format %08x [expr $base + 0x0]] -type write -data 0000f00f]
run_hw_axi write_led

Thanks,

Arthur