Greetings! Trying to understand if the Eclypse Z7 is a proper platform for my application?

[Xband]

Hi, 

I need to have a "RealTime" type acquisition of waveforms and determine and output digital logic signals based on the integration and/or combination of measured ADC signals, in this case possibly the Eclypse Z7 bundled with two Zmod Scope 1410-105s.  

I've done a similar application in Labview cRio using labview fpga and realtime development.  

I see the part listed on the xilinx site, and it suggests that you have access to fpga programming, I need to get up to speed quick on this, could easily do it in Labview/fpga, the cRio hardware is limited though. 

Any information is appreciated. 

https://www.xilinx.com/products/boards-and-kits/1-18tmbd2.html

Maybe I should speak with Sales? 

Thanks, 

Jim

Tried calling, the machine is full.  

Edited May 16, 2023 by Xband
update

[artvvb]

Hi @Xband, welcome to the forums.

Apologies for the delayed response. This is the right place to ask.

The application sounds like Eclypse would be a reasonable fit, although the amount of work/time required will depend heavily on how familiar you are with FPGAs and Vivado, and on the specifics of your application. Provided demo projects are fairly limited, implementing basic acquisition systems in one case, and a filter passthrough in another. The latter might be a good place to start for your application, cutting the AWG output path for digital signals through the Pmod ports.

The requirements on the digital logic signals could also present a problem: do not expect to easily be running fast signals through Pmod ports (maybe 20+ MHz, some users here have posted test data for other boards). Digilent doesn't specify how fast they can be run.

Thanks,

Arthur

[Xband]

Hi @artvvb, 

thanks for the response.  I went ahead and ordered one of the boards with the 2 scope modules.  I"ve put together similar applications with NI CRio so thats mostly my FPGA experience, unfortunately even though NI is the overlord the board isn't compatible with that development platform.  It will be certainly be a ramp up of learning, its the trade off of better hardware than the crio offers.  

My digital signal requirements will be on a slower time scale, perhaps it will work.  I"ve browsed through the forums, could you possibly point me with a few links what you would consider a quick start to familiarize myself?

 

Thanks for your help. 

 

Jim

[artvvb]

The previously mentioned filter demo should be useful, I'd expect the likely approach to your application would be to use that demo as a baseline and modify it to suit your needs. For best understanding of how the IP used in that design works, which will also tell you a lot about the Zmods themselves, there are IP user guides packaged in the demos and vivado-library source code - right-click on an IP and select "IP Documentation -> Product Guide".

This guide is a starting point to learn the design flow if you need to get the processor involved: https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi.

The steepest part of the learning curve would be if you want to get data into DDR or back to a host PC at any decent speed. The former involves DMA, for which there are various examples, but all of which require a lot of customization for specific applications, and the latter involves USB and ethernet, which there aren't really any good examples for at this time. If your data path stays inside of the FPGA PL, between the Zmod Scope and digital I/Os, that simplifies things a lot.

There's also a baremetal software app in this under-construction demo (https://digilent.com/reference/programmable-logic/eclypse-z7/demos/ddr-streaming) that would help extract calibration coefficients from the SYZYGY DNA, which could then be hardcoded into the Scope IP configuration, without needing to load the Linux image.

Thanks,

Arthur

[Xband]

I've spent a bit of time today downloading the Xilinx Vivado tools, earlier references implied that 2019.1 was the proper version, though there wasn't a supported installer, I installed 2019.2 but this ipi link says it will work with 2022.1?  Whats the proper version to install?  

-"Note: Screenshots presented in this guide may not have been taken with your version of the tools. The workflow process presented here has been verified in Vivado and Vitis 2022.1."

This Zscope example is quite interesting, may try to start with this, 

 

Thanks agian. 

 

Jim

 

Using the Zmod Scope 1410-105 with the Zmod Library and Eclypse Z7

https://digilent.com/reference/programmable-logic/eclypse-z7/demos/zmod-scope

 

 

 

[artvvb]

Supported versions for different materials are a problem, not sure if there's one specific version that would be best to start with - you might end up with a couple of installations. In general, any guides that you're following steps of are relatively safe to use different versions of the tools with while demos with provided sources (especially the 2019.1 demos, unfortunately, since Vitis was released since) are relatively likely to require a specific version of the tools. For the IPI guide, this older version shows the flow with Xilinx SDK, in the older versions of the tools: https://digilent.com/reference/vivado/getting-started-with-ipi/start

Thanks,

Arthur

[Xband]

Hi Arthur, 

I"ve got Vivado installed and am of course overwhelmed with how my application could work.  In general I would like to take the ADC output triggered over a certain time interval and integrate this signal, comparing to an external reference or setpoint, and produce a digital output on a pmod maybe when the limit is reached. 

I can conceptualize how this would work in Labview FPGA as I've written similar programs but I'm having difficulty understanding how these functions transform into Vivado code.  Maybe the comparison would need to happen in the embedded baremetal or petalinux domain. 

Are you aware of equivalent FPGA "math" that exists in Labview FPGA?  I've always assumed LV-FPGA was a high level wrapper for FPGA so equivalent functions would exist. 

Thanks, 

Jim