rgb2dvi ip core - repackage for UltraScale

[Michael1]

Hello, I'm in need of some help.

I want to use the rgb2dvi ip core in a non 7series fpga(ultrascale+) The prevalent problem that im seeing is that in the ultrascale+ they changed the oserdes from 2 to 3 and the ip core supports only oserdes 2. is there a way to solve the difference in oserdes? and is there another major problem that im ignoring ? 

If there is another ip core that supports the ultrascale+ fpga it will be appreciated aswell

[zygot]

UltraScale IO is substantially different than Series7 IO, especially for advanced functionality like DDR and IOSERDES. If you are familiar with Series7 IO interfaces you need to start over for UltraScale by reading the family reference manuals. You will probably need to go through multiple documents as the official AMD/Xilinx documentation on this subject can be contradictory and confusing. There is an application note about native mode oserdes on Ultrascale with design sources... good luck.

[JColvin]

Hello,

Unfortunately, this IP (rgb2dvi) is not supported for Ultrascale+ architecture and the IP will not be updated to support it for the forseeable future. To add on to what zygot said (based on what another engineer more familiar with the hardware architecture than myself told me), this is partially because the SHIFTINx and SHIFTOUTx pins are no longer present on the OSERDESE3 primitive, which the rgb2dvi core used to be able to serialize words larger than 8 bits, so any sort of upgrade effort would be non-trivial.

Thanks,
JColvin

[Ronas12]

@JColvin according to your answer, is it possible to repackage this ip core for Ultrascale families if I use a data video of 8 bits only?

And if the answer is yes, what is the changes that I need to do for this?

[zygot]

As I mentioned in the first iteration of this question by one of your cohorts, IOSERDES for UltraScale devices is substantially different that IOSERDES for Series 7 devices. Hardware features that were in the Series7 IOB have been removed in UntraScale IOB and must be replaced with logic. This is particularly a problem for migrating IOSERDES designs from Series 7 to UltraScale. Read the UltraScale reference manuals. Edited February 17, 2023 by zygot