Jump to content
  • 0

USB-2537 Logic Keeper circuit details



Please provide application details of your logic keeper circuit on the digital inputs of the USB-2537. A schematic would be good. Or maybe specifications of the current draw in the high and low states. My small-signal BJT with a 2.2K pull up resistor can't switch it high or low from its kept state. Thank you.

Link to comment
Share on other sites

1 answer to this question

Recommended Posts

  • 0


The logic keeper circuit is inside a FPGA and its inner workings are a bit a mystery. However, it is set to use 3.3 volt logic and will requires very little current to switch when connect similar circuits. Driving it above 3.3 volts requires more current. There was a graph floating around here a few years back that showed to get to 5 volt would require >6mA. Because of this, use 3.3 volt logic or use a level shift circuit to reduce your 5 volt to 3.3 volts. A simple test is to use a voltage divider that will output 3.3 volts when 5 is applied. The input should pull low with no power and high with power as long as it has been programmed to be an input.

best regards,


Link to comment
Share on other sites

Create an account or sign in to comment

You need to be a member in order to leave a comment

Create an account

Sign up for a new account in our community. It's easy!

Register a new account

Sign in

Already have an account? Sign in here.

Sign In Now
  • Create New...