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I2C master and monitor Protocol and Logic1 Analog Discovery 2


Sagi

Question

Hello, 

I have some years of professional experience with I2C debug. I am aware of bus pullups and pull down levels. 

The closest search I found to this is this post: 

I am using the AD2 as an I2C master to send commands to a slave. I have tested the slave operation with other master and the responses are as expected. 

I want to use the AD2 protocol with DIO 0 (SCL) and DIO 1 (SDA) by selecting the I2C tab and selecting Master. I then set my slave address and register address. I do a read or a write. 

I also want to see the transaction by using the Logic1 window. I select SCL to be DIO 2 and SDA to be DIO 3. I also tested the same with the protocol >> I2C >> SPY. 

I can't get this to work. in both the SPY window on the protocol I2C tab or the Logic1 tab, when I start the receive or run, as soon as I switch to the I2C Master the receive release on the SPY tab or the Run turns off. 

I assume the DIO ports are 3.3V and can tolerate 5V? My voltage on the pullup resistors are way above 1.5V at around 3.3V. 

Can the AD2 monitor what I send and receive on an I2C bus? If so, how do I do this? 

Thanks

Sagi 

 

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Hi @attila

Thank you for your response.

I am unclear with your response. It looks like that the AD2 can not be a master and a logic analyzer at the same time? 

I am using the protocol tab in I2C master to send commands to the slave device. At the same time, I want to monitor the response. If I go to the protocol window and press the I2C tab, then click on SPY and click receive the capture starts. If I switch to the master tab instead of SPY, the SPY will stop. The same behavior is happening  when I use the Protocol I2C Master and the Logic 1 run. 

How can I use the AD2 as an I2C master and monitor the slave responses at the same time? I know I can use the oscilloscope but I want to use the analyzer, either the Logic 1 windows or the protocol SPY. 

Also, I am not finding a way to have two protocol windows open at the same time so one is a master and one is a "logic Analyzer" SPY. Is there a way to do that?

Thanks
Sagi      

 

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Hi @Sagi

"The Protocol interface uses the device Digital Pattern Generator and Logic Analyzer resources to transfer data using UART, SPI, I2C, CAN, CEC protocols, and to program AVR MCUs.
When the Logic Analyzer option is enabled, the Logic Analyzer can be used to investigate the signals. In this case, the Protocol instrument will not receive data, it will only send data."
By default, when this is unchecked you can see the response (read bytes, nacks) in the bottom text field, similar as it is in the Spy tab.

image.png.51f81ba5803474abb55c2fd80b225c99.png

 

You can also use the Custom or Script tool if you want to automate things or use the Spy mode in any case.

image.png.1434567b2043d250ef59692b36c1385a.png

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Hi @attila,

Thank you. That works. 

Question, with the logic1 window, it captures the transactions on the two I2C channels configured in the Protocol window. Is it possible to also capture additional channels in the logic1 window? Say I want to also capture channels 2 and 3 that are independent I2C bus, will it capture traffic on those channels also at the same time? 

Also, the script is very nice, the whole device is very nice, Is there an in depth scripting command reference?  

 

Thanks

Sagi 

 

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Hi @attila,

This setup has been working well. One more question: Is there a way to do an I2C read without the repeated start with the I2C Master on the protocol tab? 

Example reading register 0x10 from a slave with address 0x60:

W0x60 0x10 R0x60 receive 2 byte back.  //This is with repeated start.  See screen shot below. 

 Instead I want to do this:

R0x60 0x10 receive 2 byte back.  //This is without repeated start.

Thanks

Sagi 

Sagi_Repeated_Start.thumb.JPG.6d609c0885ad81edc72051471c957066.JPG

 

 

Edited by Sagi
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Hi @Sagi

In I2C the standard procedure to read a sub-address is [S, ADR-WR, SUBADDR1, 2..., RS, ADR-RD, DATA1, 2..., P]
The RD/WR bit after Start/Re-Start Address specifies the direction of the following bytes. With WR only the master is allowed to send, slave acknowledges and with RD the slave sends bytes, master acknowledges.
The [S, ADR-WR, master-byte, slave-byte...] would violate the I2C specs.

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Hi @attila

From what I am reading in the spec, and I know from past work, the master is allowed to do a read without a write beforehand. So I think the AD2 in this case does not support the full spec? I really wish it is supported. 

If you have a slave device with with multiple registers, the pointer to the appropriate register must be set ahead of time before the read but if you have a device with only one register to read, it is allowed. 

I am looking at the https://i2c.info/i2c-bus-specification: this section: COMMUNICATION WITH 7-BIT I2C ADDRESSES

If the master only writes to the slave device then the data transfer direction is not changed.

image.png.17d42f311431fb27e5024394d6cadf17.png

If the master only needs to read from the slave device then it simply sends the I2C address with the R/W bit set to read. After this the master device starts reading the data.

image.png.7f53980e3e5ddc7b340fa9b6bdb47e92.png

Sometimes the master needs to write some data and then read from the slave device. In such cases it must first write to the slave device, change the data transfer direction and then read the device. This means sending the I2C address with the R/W bit set to write and then sending some additional data like register address. After writing is finished the master device generates repeated start condition and sends the I2C address with the R/W bit set to read. After this the data transfer direction is changed and the master device starts reading the data.

image.png.38621943bac5ca0dd462a19b9bc5080b.png

 

Thanks

Sagi 

 

 

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Hi @Sagi

The WF app supports all/the mentioned I2C specs.

For devices with registers the first written byte(s) represent the register address. For 8bit regs the first bytes, for 16bit the first 2 bytes...

To read from a register the direction needs to be changed with repeated start: [Start, I2CADR-WR, REGADDR, Sr, I2CADR-RD, DATA1, 2..., stoP] or
[Start, I2CADR-WR, REGADDR1, 2..., Sr, I2CADR-RD, DATA1, 2..., stoP] 
Some devices require such restart other work fine with stop/start (separate write-register-address and read-data transfers).

To write to a register the direction does not need to be changed: [S, I2CADR-WR, REGADDR, DATA1, 2..., stoP] or
[S, I2CADR-WR, REGADDR1, 2..., DATA1, 2..., stoP]

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Hi @attila

That is not the same as just a read. [S, SLA/R, Data]. I wish I can disable the write beforehand. I want to do just this: 

image.png.f2fc667b911887809b491bc3acf1b182.png

I have worked with I2C masters before, at least the three that I worked with can do this. 

Thanks

Sagi 

Edited by Sagi
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