ehfdub Posted October 11, 2021 Share Posted October 11, 2021 Hello, I just purchased a Digilent Nexys A7 100T. I'm trying to build a base microblaze design using Vivado 2021.1 which includes Ethernet support. I'm following this tutorial https://digilent.com/reference/learn/programmable-logic/tutorials/nexys-4-getting-started-with-microblaze-servers/start?redirect=1 At step 5 it says to add "Ethernet PHY MII to Reduced MII" but that module has been discontinued by Xilinx https://www.xilinx.com/support/documentation/ip_documentation/mii_to_rmii/v2_0/pg146-mii-to-rmii.pdf How can I create the microblaze/ethernet block diagram described in the tutorial above without that RMII module? Thanks, Ehf Link to comment Share on other sites More sharing options...
0 JColvin Posted October 13, 2021 Share Posted October 13, 2021 Hi @ehfdub, You may be able to grab the RMII IP from an older version of the Xilinx tools and simply copy-paste it over into the IP list of Vivado 2021.1, though I haven't tried this recently so I do not know off the top of my head how well that would work. I'm hoping to be able to try that this week. Thanks, JColvin Link to comment Share on other sites More sharing options...
0 ehfdub Posted October 15, 2021 Author Share Posted October 15, 2021 Thanks @JColvin! That's a great idea. Do you know how to add IP from an older version of the Xilinx tools to a new version of the tools? I installed Vivado 2017.4 and coped the folder "C:\Xilinx\Vivado\2017.4\data\xsim\ip\mii_to_rmii_v2_0_17" to "C:\Xilinx\Vivado\2021.1\data\xsim\ip\mii_to_rmii_v2_0_17" then restarted Vivado 2021 but the MII-RMII IP did not show up in the IP list: Any ideas? Thanks, Ehf. Link to comment Share on other sites More sharing options...
0 JColvin Posted October 15, 2021 Share Posted October 15, 2021 Hi @ehfdub, Oh right, that technique doesn't work anymore in newer versions of Vivado (I seem to recall that it used to work, but I'm wrong). The way I do it is by copying the mii_to_rmiiv2_0 out of the Vivado IP location (I picked ../Xilinx/Vivado/2019.1/data/ip/xilinx as where to pull the IP from) and paste in a separate location. In the newer version of Vivado, in the Project Manager on the left, I click Settings -> IP -> Repository and then add the mii_to_rmii IP as a repository for the project. Though now that I'm looking at it, it looks like the newer board files for the Nexys A7 (https://github.com/Digilent/vivado-boards) already incorporate this depreciated IP for you. I wasn't able to successfully generate a bitstream in 2021.1 though and it will take awhile before I can debug it. Thanks, JColvin Link to comment Share on other sites More sharing options...
Question
ehfdub
Hello,
I just purchased a Digilent Nexys A7 100T. I'm trying to build a base microblaze design using Vivado 2021.1 which includes Ethernet support. I'm following this tutorial https://digilent.com/reference/learn/programmable-logic/tutorials/nexys-4-getting-started-with-microblaze-servers/start?redirect=1
At step 5 it says to add "Ethernet PHY MII to Reduced MII" but that module has been discontinued by Xilinx https://www.xilinx.com/support/documentation/ip_documentation/mii_to_rmii/v2_0/pg146-mii-to-rmii.pdf
How can I create the microblaze/ethernet block diagram described in the tutorial above without that RMII module?
Thanks,
Ehf
Link to comment
Share on other sites
3 answers to this question
Recommended Posts
Create an account or sign in to comment
You need to be a member in order to leave a comment
Create an account
Sign up for a new account in our community. It's easy!
Register a new accountSign in
Already have an account? Sign in here.
Sign In Now