Looking over Xilinx's ILA documentation (http://www.xilinx.com/support/documentation/ip_documentation/ila/v5_0/pg172-ila.pdf) resource utilization section, it seems the ILA uses quite a bit of logic fabric (though the data is from a Kintex 7 fpga and I don't know how big the resource usage difference is between this family and the artix 7).
Have any of you successfully used the ILA with the basys 3, and if so, how much of the fpga was occupied by it?
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andrei
Hello,
As I can see, the basys 3 locked Vivaldo license allows for the use of the ILA (Integrated Logic Analyzer) IP core; artix 7 also shows as a supported fpga family on http://www.xilinx.com/products/intellectual-property/ila.html
Looking over Xilinx's ILA documentation (http://www.xilinx.com/support/documentation/ip_documentation/ila/v5_0/pg172-ila.pdf) resource utilization section, it seems the ILA uses quite a bit of logic fabric (though the data is from a Kintex 7 fpga and I don't know how big the resource usage difference is between this family and the artix 7).
Have any of you successfully used the ILA with the basys 3, and if so, how much of the fpga was occupied by it?
Thank you
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