ScottPark Posted February 10, 2021 Share Posted February 10, 2021 It seems to me the provided MIG .ucf and .prj files are a little outdated. Does anyone have a free to use DDR3 Controller for the Nexys Video 256M by 16-bit DDR3 project that they could spare? I would like it to be written in Verilog HDL. In exchange I have a 720p HDMI Core written in Verilog for the NV... https://github.com/DendriteDigital/verilog/blob/master/HDMI_TMDS_TEST.v Link to comment Share on other sites More sharing options...
JColvin Posted February 11, 2021 Share Posted February 11, 2021 Hi @ScottPark, I'm confused by your comment that the MIG files seem outdated. The .prj, available for download in the Additional Resources section of it's Resource Center (link), is targeting MIG version 4.2 which is the version used in Vivado 2020.2. Thanks, JColvin Link to comment Share on other sites More sharing options...
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ScottPark
It seems to me the provided MIG .ucf and .prj files are a little outdated.
Does anyone have a free to use DDR3 Controller for the Nexys Video 256M by 16-bit DDR3 project that they could spare?
I would like it to be written in Verilog HDL.
In exchange I have a 720p HDMI Core written in Verilog for the NV...
https://github.com/DendriteDigital/verilog/blob/master/HDMI_TMDS_TEST.v
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