Using Digilent Genesys 2 board to Capture 560Mhz Data

[david.webster@integra-tech]

I have a current need to capture data from an IC under test whose 8 output channels are running at 560Mhz each using the same clock source. Data is be strobed out of the device on the rising and falling edge of a clock source which is only running at 280Mhz. Is it possible to design the Digilent Genesys 2 board into my test application hardware to allow it to capture the data and then retrieve this data at a lower rate thru a serial interface later. I would want the capture to be trigger based on an external input and also stopped the same way. I am not concerned with how long it takes to pull the data out of the board, but the capture and storage of data are important. The total number of bits per channel would be less than .5M for each channel and all outputs are synchronized with a single clock. If this board is not the right fit, is there perhaps another board which can also be used.

Thanks
David Webster 

[JColvin]

Hi David,

I do not personally know if the Genesys 2 is capable of performing at that rate. I have asked some of our applications engineers for their recommendation.

Thanks,
JColvin

[sbobrowicz]

The Genesys2 should work fine for what you are trying to do. You will need to rig up an FMC mezzanine card that connects to your IC in order to get the signals into the Genesys2. You will also want to double check that the termination scheme on the Genesys2 will work for whatever differential signaling standard you are using. For information on the signaling standards supported by the Kintex FPGA, see the

7 Series FPGAs SelectIO Resources User Guide (UG471) 

available from Xilinx.

You will be able to buffer the data in the 1GB of onboard DDR3. The serial interface and triggers can be connected to the FPGA via the Pmod connectors or the FMC rig you come up with.