Querries Regarding FFT Magnitude Response

[AAJ]

Dear Sir,

I am trying to generate Sinusoidal frequency using DDS Compiler in Vivado Block Designing and want to check its FFT Magnitude.
I have few Querries to ask.
First thing is that what will be the effect on output magnitude and xk_tuser index of FFT, if we use simple SINE or SINE AND COSINE.
As in general we get two peaks for sine wave while for SINE AND COSINE we get single peak with added magnitude (please correct me if I am wrong).
Secondly, I am not sure whether my FFT Magnitude Block is right or not (Figure Attached) , I have used two Slices at the output of FFT IP m_axis_data_tdata to separate Real and Imaginary parts, but do we need to specify separte MSBS and LSBS in it or not.
Third thing is that, if we select SINE and COSINE option in DDS, then in FFT Magnitude block, how many bits for Tuser index will represent Sine and Cosine Magnitude. As Log base 2 (4096) is 12.

Expected Index: 50K/ (100M/4096) = 2.048 : 10

DDS Details:
Configuration: Phase Generator and SIN COS LUT, System Clock : 100M
System Parameters, 
Implementation:
Fixed, Phase Offset: None, Output Selection: Sine and Cosine
Frequency 50KHZ

FFT Details:
Transform Size: 4096, Target Clock:100M, Radix2 Busrt I/O Architecture
Implementation: Fixed Point, Block Floating Point, Covergent Rounding
Input Data Width:8 , Phase Factor Width: 8
XK_Index, throttle Scheme: Real Time 

 

Your kind Response will be highly appreciated.

[D@n]

@RJ16,

1. To know the effect on the FFT magnitude of using just a sine vs a sine plus a cosine, try mapping the inputs to complex exponentials first.  For complex exponentials of equivalent magnitudes, the magnitudes at the output of the FFT *should* be the same.  Be careful of overflow in this calculation.  With only 8-bits, you don't have a lot to work with.
2. I don't normally use Xilinx's slice primitive.  However, if you wanted to separate out the bits from an FFT output, I'd be surprised if you didn't have to specify which bits of the slice you were actually interested in. 
3. I'm not sure I follow your third question.  Why would TUSER have any useful information in it at all?

Here are some other things you might be interested in though.

1. Here's an approximate log-magnitude block I built some time ago.  It calculates FFT magnitude first.
2. I recently wrote about debugging AXI streams, such as the FFT would either produce or consume.  You might find the article and associated code valuable.

Hope that helps!

Dan

[AAJ]

14 hours ago, D@n said:

To know the effect on the FFT magnitude of using just a sine vs a sine plus a cosine, try mapping the inputs to complex exponentials first.  For complex exponentials of equivalent magnitudes, the magnitudes at the output of the FFT *should* be the same.  Be careful of overflow in this calculation.  With only 8-bits, you don't have a lot to work with.

With great apology, I could not get this point, are you saying to check FFT magnitude at m_axis_data_tdata?

14 hours ago, D@n said:

I don't normally use Xilinx's slice primitive.  However, if you wanted to separate out the bits from an FFT output, I'd be surprised if you didn't have to specify which bits of the slice you were actually interested in. 

I have specified bits, but as you can see in the figure , I am ripping both slices into 16 bits, is it correct or not?

14 hours ago, D@n said:

I'm not sure I follow your third question.  Why would TUSER have any useful information in it at all?

Aren't we supposed to check Index of the FFT peak  on TUSER? 

 

Sorry for my dumbness, I am a beginner user to vivado that is why I am not clear about so many things, Also I am only doing block level designing at this stage , i havent done any verilog coding yet.

Thank you for your attention, I am looking forward to your reply.

[D@n]

@RJ16,

7 hours ago, RJ16 said:

With great apology, I could not get this point, are you saying to check FFT magnitude at m_axis_data_tdata?

Let me try this again then.  Using Euler's formula, we know that cos(2pi ft) = 1/2 e^(j2pi ft) + 1/2 e^(-j2pi ft), and sin(2pi ft) = 1/2/j e^(j2pi ft) - 1/2/j e^(-j2pi ft).  The FFT reports results in frequency bins, BIN = f * 1/N.  To map from cos and sin to complex exponentials is simply to do the mapping just described, on paper (not FPGA), to get an understanding of what the FPGA is supposed to return to you.

7 hours ago, RJ16 said:

Aren't we supposed to check Index of the FFT peak  on TUSER?

I suppose you could.  I've never done so.  If you did so on an N point FFT, than log_2(N) should be the number of bits in TUSER.

Let's talk bits now for a moment.  If you have B real and B imaginary bits going into this FFT, then IIUC you should have B real and B imaginary bits coming out.  At full bit-width, you should have B+log_2(N)/2 bits coming out--but most implementations truncate this and scale a bit every other stage to keep it so that you have B bits going in and B bits coming out.  That means that there'll be a scale factor within your FFT that you may need to know about.  But, assuming you don't have any overflows and you have the scaling right, then B bits come out of the FFT for each real and each imaginary component.  This bit width is independent of TUSER.  If you square these bits in order to form a magnitude, you'll end up with 2B bits (for the real value squared) and 2B bits (for the imaginary value squared).  Adding these together to actually get your magnitude should give you 2B+1 bits.

The number of bits in your magnitude will be completely independent of the number of TUSER bits, although if you aren't careful the two will be misaligned.

7 hours ago, RJ16 said:

Sorry for my dumbness, I am a beginner user to vivado that is why I am not clear about so many things, Also I am only doing block level designing at this stage , i havent done any verilog coding yet.

Dumbness?  You sound quite willing to learn.  That's not dumb.  Beginner, yes, dumb, no.

I would recommend abandoning block design as soon as you can.  In my own humble opinion, it doesn't translate well to real design and you just learn a lot of bad habits along the way.  If you are at all interested, I'd recommend you work through an online tutorial--this one for example--and learn sooner than later.

Dan

 

[zygot]

On 4/24/2020 at 7:23 AM, D@n said:

I would recommend abandoning block design as soon as you can.