Nexys A7 - Microblaze DMA Audio Demo - not work

[Michal Hucik]

Hi,
I have a new Nexys A7-100T board. I wanted to try the Microblaze DMA Audio Demo. I have installed Vivado 2018.2 and downloaded latest version of the demo for actual version of my board. I follow the README.md instructions, but in the point 18 I receive error message in SDK. 

 

18. In the Project Explorer pane, right click on the "Nexys-A7-100T-DMA-Audio" application project and select "Run As -> Launch on Hardware (System Debugger)".

 

What am I doing wrong?

Here is SDK log:

 

21:51:24 INFO    : Registering command handlers for SDK TCF services
21:51:24 INFO    : Launching XSCT server: xsct.bat -interactive C:\share\VivadoProjects\a7\DMA-audio\vivado_proj\Nexys-A7-100T-DMA-Audio.sdk\temp_xsdb_launch_script.tcl
21:51:24 INFO    : XSCT server has started successfully.
21:51:24 INFO    : Successfully done setting XSCT server connection channel  
21:51:25 INFO    : Successfully done setting SDK workspace  
21:51:25 INFO    : Processing command line option -hwspec C:/share/VivadoProjects/a7/DMA-audio/vivado_proj/Nexys-A7-100T-DMA-Audio.sdk/design_1_wrapper.hdf.
21:54:30 INFO    : Connected to target on host '127.0.0.1' and port '3121'.
21:54:33 INFO    : 'targets -set -filter {jtag_cable_name =~ "Digilent Nexys A7 -100T 210292AD3694A" && level==0} -index 0' command is executed.
21:54:35 INFO    : FPGA configured successfully with bitstream "C:/share/VivadoProjects/a7/DMA-audio/vivado_proj/Nexys-A7-100T-DMA-Audio.sdk/design_1_wrapper_hw_platform_0/download.bit"
21:55:19 INFO    : 'targets -set -filter {jtag_cable_name =~ "Digilent Nexys A7 -100T 210292AD3694A" && level==0} -index 0' command is executed.
21:55:19 INFO    : 'fpga -state' command is executed.
21:55:19 INFO    : Connected to target on host '127.0.0.1' and port '3121'.
21:55:31 INFO    : Jtag cable 'Digilent Nexys A7 -100T 210292AD3694A' is selected.
21:55:31 INFO    : 'jtag frequency' command is executed.
21:55:31 INFO    : 'configparams mdm-detect-bscan-mask 2' command is executed.
21:55:31 INFO    : Context for processor 'microblaze_0' is selected.
21:55:31 INFO    : Processor reset is completed for 'microblaze_0'.
21:55:31 INFO    : Context for processor 'microblaze_0' is selected.
21:55:31 INFO    : The application 'C:/share/VivadoProjects/a7/DMA-audio/vivado_proj/Nexys-A7-100T-DMA-Audio.sdk/Nexys-A7-100T-DMA-Audio/Debug/Nexys-A7-100T-DMA-Audio.elf' is downloaded to processor 'microblaze_0'.
21:55:31 INFO    : ----------------XSDB Script----------------
connect -url tcp:127.0.0.1:3121
configparams mdm-detect-bscan-mask 2
targets -set -nocase -filter {name =~ "microblaze*#0" && bscan=="USER2"  && jtag_cable_name =~ "Digilent Nexys A7 -100T 210292AD3694A"} -index 0
rst -processor
targets -set -nocase -filter {name =~ "microblaze*#0" && bscan=="USER2"  && jtag_cable_name =~ "Digilent Nexys A7 -100T 210292AD3694A"} -index 0
dow C:/share/VivadoProjects/a7/DMA-audio/vivado_proj/Nexys-A7-100T-DMA-Audio.sdk/Nexys-A7-100T-DMA-Audio/Debug/Nexys-A7-100T-DMA-Audio.elf
----------------End of Script----------------

21:55:31 ERROR    : Memory regions update error: JSON syntax error:
 *: ...104FED9E&0&21","AdditionalInfo":" (board power off)","JtagDeviceID":255,"JtagNodeID":"jsn-DLC9-USB\VID_03FD&PID_0008\6&104FED9E&0&21","JtagGroup":"JTAG-jsn-DLC9-USB\VID_03FD&PID_0008\6&104FED9E&0&21"}
21:55:31 ERROR    : Memory regions update error: JSON syntax error:
 *: ...104FED9E&0&21","AdditionalInfo":" (board power off)","JtagDeviceID":255,"JtagNodeID":"jsn-DLC9-USB\VID_03FD&PID_0008\6&104FED9E&0&21","JtagGroup":"JTAG-jsn-DLC9-USB\VID_03FD&PID_0008\6&104FED9E&0&21"}
21:55:31 INFO    : Disconnected from the channel tcfchan#1.
21:55:31 ERROR    : Invalid target. Use "connect" command to connect to hw_server/TCF agent

 

Regards, Michal

[JColvin]

Hi @Michal Hucik,

Could you provide a picture of your setup so I can see how the board is powered?

Is the Nexys A7 able to be detected in the Vivado Hardware Manager (or alternatively, the Digilent Adept software)? The other thing I might recommend is trying a different USB cable or USB port since it seems based on the output that Xilinx SDK is able to detect the board (via the jtag_cable_name) but then is not able to properly detect the board afterwards.

Thanks,
JColvin

[Michal Hucik]

Hello JColvin,
thank you for reply.

While I writing a long answer I discovered the cause of the problem

I have connected the Nexys A7 board by USB cable, but in another USB port I have connected (unused) Xilinx USB cable. When I connecting to FPGA (bitstream upload), so Vivado and SDK using USB cable and all works fine. When the System debugger is started, so unused Xilinx USB cable is discovered and debugger is crashed.
I disconnected the Xilinx USB cable from the PC and the big problem is solved

Yet thank you again for your answer.

Regards, Michal

[JColvin]

I'm glad you found out what the problem was; thank you for sharing what you found!