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JTAG emulator board


Ehud Eliav

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hi

I would like to buy an JTAG EMULATOR board,

I have developed an environment which is able to send JTAG commands and parse the TDO received from the tested devise.

My motivation is to validate my environment on an existing devise that support the JTAG protocol,

and perform read /write operation to that devise.

Thanks in advance.

by the way... i have the HS2 devise, can it be used as JTAG client/slave?

Ehud Eliav 

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Hi,

I doubt that you can convert a JTAG master into a slave (there is little symmetry in the protocol) but you should be able to use just about any FPGA or microcontroller board, as long as it has a hardware (not USB) JTAG port.

From the top of my head I can't come up with a low-end Digilent board with hardware JTAG port. Now If I had to pull the cheapest suitable board from my own collection it would be a tie between Trenz DIPFORTy1, Xess Zula II, Papilio Pro and Numato Saturn, probably decided by shipping charges.

If you search a bit, you might find much cheaper options for "something" with JTAG, like an obsolete WLAN or DSL router for example.

I can't think of any dedicated out-of-the-box JTAG slave hardware. This could be a typical use case for an FPGA but a non-trivial design effort (not recommended)

PS if your master works at a fixed voltage only (e.g. 3.3 V), double-check that the slave voltage matches.

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14 hours ago, xc6lx45 said:

just remembered something: the "tinyFpga" boards with Lattice devices should work also and are 1/3 the price of above.

thanks for your advise,

I have started looking on it,

Let me know if my understanding is correct, 

since this tinyGPGA already contain JTAG interface it may include basic functionality like read FPGA ID / serial number /write instructions...in that case i just need to download the FPGA data sheet / application note to check what are the predefined instructions the FPGA supports and run it with my environment.

my assumption is correct ?

BR

Ehud

 

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On 12/30/2019 at 7:47 PM, xc6lx45 said:

yes, exactly. I haven't tried it myself with Lattice , only Xilinx (I have my own USB JTAG code e.g. to upload a bitstream to Xilinx FPGAs, here https://forum.digilentinc.com/topic/17096-busbridge3-high-speed-ftdifpga-interface). But I wouldn't expect any surprises. Some of the basic functions e.g. IDCODE are standardized.

Thank you!!!

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