Search the Community

Hello all: we are using FT2232H on our boards to emulate the JTAG cable such it is recognized by Xilinx tools, ISE and Vivado. The most convenient solution is to use the Digilent driver which is already provided with Xilinx tools. I wonder what is the exact configuration of the FT2232H to enable using this driver? Could you please share the details? Thank you, Wojtek SkuTek Instrumentation

Hey Everyone, Has anyone successfully set up the Arty A7 using the 6-pin JTAG connector? If so, what essential information should I be aware of for this configuration?

Hello, I have the JTAG-SMT Digilent usb JTAG module, and it can't detect by Vivado and Adept, I suspect that I accidentally erased the EEPROM on the module. Is there any way to reprogram the JTAG programmer EEPROM? Thank you for your help.

Hello I have a Digilent USBJTAG HS2 and I'd really like to use it with TopJTAG's Probe software. The software has native support for the Digilent USB-JTAG but not the USB JTAG HS2. Having said that, it supports "custom" JTAG probes based on the FTDI chipset and recognises the HS2 as such. This is encouraging. When I select the Custom FTDI option it asks me to tell it what to do with the FTDI GPIOs and advises that different probed need their GPIOs setting up differently - often to enable buffers, drive tRST, and stuff like that. Sounds fair enough to me. The problem is that I cannot find documentation on how the GPIOs are used/configured on the HS2. The schematic would help, but the link to the schematic on the digilent website is dead. Can anyone help with the GPIO config or a schematic of the HS2? Many thanks. Andrew

We are using a JTAG-SMT3 and we are seeing odd behavior where we provide a USB connection to the JTAG-SMT3, which allows us to make a Serial connection to our SoC's UART connection. However, the JTAG connection to the SoC is not working, even though it utilizes the same USB interface to the JTAG-SMT3 as the UART does. We tried to see if there was continuity from the UART and JTAG lines to the FT2232HQ, but there wasn't. We assumed we were going to be able to get it for the UART but not the JTAG, but neither showed so that test didn't help explain a reason for the issue.

Hello @JColvin , Thank you, now it could find spartan7, ZYNQ PL and ZYNQ PS. But still couldn't find Kintex UltraScale+, like XCKU3P or XCKU15P, It's a strange phenomenon. Luo Yong

Hello, I recently ordered an HS3 programming cable, but was not aware that it is not compatible with 6-pin boards. Is there any way to use the HS3 to program boards with a 6-pin JTAG interface? With jumper cables or something? Otherwise would it be possible to exchange the cable for an HS2? Thanks!

Hi, We are using Metaware debugger with Digilent JTAG-HS2 cable Rev.A for JTAG connection. When 20 taps are in the chain, the chain is identified and we are able to connect to every processor and do single wr/rd, but failed to download data with some of the processors. In waves, we noticed that between successful write transactions we see an unexpected command of 4 clocks of high TMS with low TDI that coming from the driver. When reducing number of participating taps in the chain to 16, we are able to download to all remained processors successfully. The issue is consistent with other HS2-RevA cables. Issue sound similar to the following post in the forum: Is there any known HW issue in the cable or in the driver? Thanks.

Hi, Managed to reprogram the JTAG-HS3 by accident, when it was connected together to the PC with another FTDI product that was meant to be reprogrammed. Vivado and Vitis does not recognize the cable anymore. Cannot find the original eeprom content anywere on the NET too. Could some one please help with this problem?

Hi, Hope you're doing good. We flashed boot image through SD, QSPI successfully following docs. Now we are trying to flash boot image through JTAG via microUSB but we are unable to flash image through JTAG. Steps: 1. Changed boot mode switch to JTAG mode. 2. Connected microUSB cable to hostpc(linux) & target board. 3. Tried to connect jtag via hwserver tool, vivado, petalinux hoping we can able to flash through the software tools. But we weren't able to flash. Questions: Can we able to flash the image through JTAG mode using microUSB cable? Is that we are missing something? Please Help! Thanks, Saravanan

Hi, I am trying to program RFSoC2x2 board by Xilinx (Running PYNQv2.7) with XUP USB-JTAG programming cable (https://digilent.com/shop/xup-usb-jtag-programming-cable/) using Vivado 2020.1.1 on Windows 10 but I am being unable to install cable drivers for the cable. I followed the procedure mentioned by one of your employee on Digilent Forum: https://forum.digilent.com/topic/13275-xup-usb-jtag-programmer/ but it doesn't seem to be working for the combination of OS and software version I have mentioned above. Can you please confirm whether cable works for the Vivado 2020.1.1 on windows 10 for Xilinx RFSoC2x2 board? Hereby attaching the screenshots from the procedure I followed for installing cable drivers:

The Jtag was working well before it broke when debugging. I have tried both freedomStudio and Vivado tools to connect the board, but have following error messages jtag probe Using JTAG Error: JTAG scan chain interrogation failed: all ones Error: Check JTAG interface, timings, target power, etc. Error: Trying to use configured scan chain anyway... Error: riscv.cpu: IR capture error; saw 0x1f not 0x01 Error: [riscv.cpu] Unsupported DTM version: 15 Error: [riscv.cpu] Unsupported DTM version: 15 Error: [riscv.cpu] Unsupported DTM version: 15 Error: Target not examined yet Error: [riscv.cpu] Unsupported DTM version: 15 Thanks

Hello everyone, I'm currently facing some strange behavior of an SPI interface on my Eclypse Z7: Everything works perfectly fine as long as the board is programmed through QSPI for debugging - the self-test is good, with no errors, and I can use the device as expected. However, once I try to program it via JTAG (or from SD card), the SPI self-test fails with error #14, indicating an unexpected register value in the configuration register: #define XST_REGISTER_ERROR 14L /*!< A register did not contain the expected value */ Also, when trying to send some data after the failed test, the code gets stuck in the sending / receiving process. We're using SPI #1 as an output to control an external DAC through EMIO. The signal is routed through the PL to one of the PMOD connectors, as shown in the attached screenshot. (SPI #0 is also used as an input to read from an external ADC but works without any problems in both cases, even after programming the device via JTAG. ) So only SPI #1 is affected by the problem. Both SPI devices are initialized by the same code (shown below). The only difference is their usage in the PL. int setupSPI(XSpiPs *spiPtr, u16 deviceID, u8 SlaveSelectAddr, bool clkPhaseOne, u8 clkPrescaler) { xil_printf("Setting up SPI instance...\r\n"); int Status; XSpiPs_Config *Config; /* * Initialize the SPI driver so that it's ready to use * Look up the configuration in the config table, then initialize it. */ Config = XSpiPs_LookupConfig(deviceID); if (NULL == Config) { xil_printf("ERROR: SPI setup failed on configuration lookup.\r\n"); return XST_FAILURE; } Status = XSpiPs_CfgInitialize(spiPtr, Config, Config->BaseAddress); if (Status != XST_SUCCESS) { xil_printf("ERROR: SPI setup failed during config initialization.\r\n"); return XST_FAILURE; } /* * Perform a self-test. */ sleep(1); Status = XSpiPs_SelfTest(spiPtr); if (Status != XST_SUCCESS) { xil_printf("WARNING: SPI self-test error #%d\r\n", Status); //return XST_FAILURE; } /* * Set the SPI device as a master with manual start and manual * chip select mode options */ if (clkPhaseOne) { XSpiPs_SetOptions(spiPtr, XSPIPS_MANUAL_START_OPTION | \ XSPIPS_MASTER_OPTION | XSPIPS_FORCE_SSELECT_OPTION | XSPIPS_CLK_PHASE_1_OPTION); } else { XSpiPs_SetOptions(spiPtr, XSPIPS_MANUAL_START_OPTION | \ XSPIPS_MASTER_OPTION | XSPIPS_FORCE_SSELECT_OPTION); } /* * Set the SPI device pre-scaler to divide e.g. by 8, resulting in a clk rate of ~20,833 MHz (ADC maximum: 63 MHz / DAC maximum: 20 MHz) */ XSpiPs_SetClkPrescaler(spiPtr, clkPrescaler); // Set Slave select output. Status = XSpiPs_SetSlaveSelect(spiPtr, SlaveSelectAddr); if (Status != XST_SUCCESS) { xil_printf("ERROR: SPI failed setting Slave Select.\r\n"); return XST_FAILURE; } xil_printf("--> SPI setup successful.\r\n"); return XST_SUCCESS; }//setupSPI Both, XSpiPs_LookupConfig and XSpiPs_CfgInitialize don't return any errors, no matter how the Eclypse Z7 is programmed. I'm glad for any advice, thanks in advance.

Hi, I'm looking for a smaller size JTAG connector due to space constraints in my board. I came across this 6pin JTAG cable(in the image). My design has Xilinx Ultrascle+ MPSoC FPGA. Is this compatible with the FPGA I have? Appreciate a quick response as it will help me choose a better solution. Thanks in Advance!

I am hearing some modules are going obsolete. Which module should I be purchasing if I were to use it with Vivado 2018.3?

Hello, I'm trying to connect a JTAG-HS3 (Rev.A) with a Spartan-7 (XC7S6-1FTGB196C) using Vivado Lab Edition 2021.2 but Vivado keeps telling me that I should check cable connectivity and Spartan-7 cannot be found.I tried two HS3 to be sure it's not damaged. I tried speed down to 125kHz. A Xilinx platform cable USB II works fine with same cable (HS3 needs a extra pin header since HS3 and platform cable have different genders). VREF is at 3V3. TCK, TMS, TDI and TDO have all a 10k pull up. The levels of TCK and TDI look fine during startup (3V3) but drop down to 1V after a short while. Spartan-7's flash hasn't been written yet. Any idea what's wrong here? What pull ups/downs are needed by HS3? Thanks a lot for all your help in advance!

I am interfacing between a USB IC (a FT2232H FTDI chip) and a EEPROM IC (a 93AA56BT). To make the FTDI chip recognizable by Xilinx tools I need licensed Digilent Serial Numbers. How can I get a licensed serial number file to enable a USB-JTAG FTDI interface? Are these licenses keyed specifically to your chips? How can I enable a JTAG-USB FTDI interface?

Hi all, I'm looking for an IBIS model or some sort of simulation model for the JTAG-SMT2. Please let me know if there is one available or something that I can use/reference for my SI simulations. Thanks!

I'm having trouble programming a XCKU060 with the JTAG-HS3. Occasionally it succeeds and programs correctly, maybe 1 in 10 tries, but mostly programming fails with "ERROR: [Labtools 27-3165] End of startup status: LOW" Using the Xilinx DLC9G JTAG adapter on the same board always succeeds in programming. Looking at a logic analyzer capture of the JTAG data there is a point where it looks like the TDI gets stuck high when the programming fails. It seems like there is some state or timing issue, but I'm not sure how to figure out what it is. I've tried different JTAG speeds, even down to 125Khz and it's always the same. Any help would be apricated. Thanks

Hi Digilent, I often got a information " The selected cable is being used by another application. Please retry the current operation. " from ISE iMPACT 14.7 when I used JTAG-HS2 device to program xilinx Spartan-6 device. But I did't use JTAG to do anything. I had make sure the driver is last. Does anyone have any idea? Thanks.

Using a Genesys ZU board with a Xilinx FMC-105 board, I am attempting to connect a JTAG/TRACE probe using the JTAG header on the FMC. The probe reports TDO appears always high. I confirmed that the JTAG header on board (J28) works with a Xilinx probe, but does not work from the FMC. Examining the schematics I noticed that FMC_TDO is tied to JTAG_TDO and FPGA_TDI is tied to JTAG_TDI. That seems wrong to me. I was expecting that the FMC_TDO would go to the FTDI/USB TDI. I know the schematic page is omitted because of licensing issues, but can you confirm that the JTAG chain is functional from the FMC side.

Hi everyone, so I have a atypical question about J17 port. So accidentally I damaged it, because the board fall and the micro usb cable was connected to PROG port so the board throws the port and causes a physical damage on it. I want to repair it, resoldering the port, because it’s more practical carry a Micro USB cable instead a JTAG to USB converter to program. So if you can help me with the verification of the connections. For example the USB OTG port J13 looks like all the pines are used although the UART port J14 looks like only uses 4/5 pines. I attach the photo of the crime scene and if someone could help me about the connections of the died points. Thanks a lot. ??

I need to use the JTAG header to program the Zedboard, since the MicroUSB connector is physically damaged. I cannot find any documentation or forums about how to use the JTAG connector for programming the FPGA, so I am going to ask for your help. I have a basic design in Vivado for making switch 0 toggle led 0. The bitstream is ready to be sent to the FPGA. However, when I try to connect to the hardware, by clicking "Open target", it is unable to connect. When I try to manually connect: I am using Xilinx Platform Cable USB adapter for connecting the JTAG to the computer's USB input: I have the driver installed, and it appears in my list of devices when plugged in, and disappears if I unplug it, and is up-to-date: I suspect the jumpers may not be configured properly? But again I cannot find clear documentation on how to set this up. This is how mine is set up: Here is some information about my computer: I am using Vivado 2016.1, since that is used in a lot of the tutorials. I think the Diligent tutorial uses 2016.2. It also comes with the Zedboard board file, although I downloaded the one made by Diligent as instructed in the tutorial. I hope I have provided enough information. I appreciate any help!

Hi , We are working on custom board based on zynq ultrascale+RFSOC . We had configured FTDI4232H channel 0 as JTAG port using FT_Prog utility. FPGA is not getting detected. It was found that specific EEPROM image has to be programmed for accessing FPGA through FTDI4232H. Can you please provide EEPROM image. If EEPROM image cannot be provided can we get preprogrammed FT4232H ICs. Thanks, sandeep