sungsik Posted July 29, 2019 Share Posted July 29, 2019 Hi. I'm beginner of zynq. When I was designing with hdl on spartan6, I drew a timing diagram and designed a state machine to make the desired signal from the desired state. So, I've already designed a state machine. However, I am not sure because I am going to use this state machine in combination with the aurora ip and gpio ip of xilinx. I want to design to interact with gpio1 in some states and gpio2 in others state. (i mean that read value from gpio to PL side in specific state.) For do that, do i design a state machine in custom axi ip? Can i control it only with hdl? Or do I have to control it with C code in SDK? I'm sorry that the question is not clear because I don't know well. Thanks. Link to comment Share on other sites More sharing options...
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