Arty GPIO demo UART communication

[ColoradoAnalog]

I just got an Arty board and have been going through the demo at https://reference.digilentinc.com/arty:gpio  I made it to section 4.2 and now I am stuck. I downloaded Realterm and installed it but am not seeing any results. Do you have more specific instructions about the required settings to get the terminal window to show the messages that are supposed to happen? Are there settings that need to be changed from the defaults other than the ones listed in the demo instructions? Under the Port tab what should the Port setting be?  Do any of the other settings matter?

Thank you

[lemoutan]

I thought I might be able to do better than that by looking at the log files. So I looked for them but found only a couple that I'd explicitly saved. They're attached - the shorter 5kb 2015.4 one is the one that told me that I had to use viv 2015.3 to effect some kind of source updating, and the 64k [because it got further] 2015.3 log is where I got stuck because (as mentioned in the xilinx thread) I did not know how to 'open a design' so blindly guessed at what to do next, something happened, but I still failed to complete (because of a missing tcl script which 'they' claimed would be there but wasn't).

As it happens I posted my woes first on the xilinx forum as a more detailed report. It included the 8-4442s you cite above. I kept checking back for replies but responses came there none. Until, that is, I just went back there to get its URL for you and noticed one! Apparently somebody responded on the 26th April, but the forum software didn't tell me (I'd long given up waiting for responses by then). It looks like xilinx's forum is an opt-IN-for-responses notification type whereas here at digilent it must be an opt-OUT-of-responses notification system.

So I should now toddle over to xilinx's forum and apologise to the helpful person there for my late acknowledgement (and try to find out how to opt in for responses!). And then I suppose I'd best try the presented workaround (the claimant notes it's not a solution, just something that seemed to work). I'll need to follow the path I took a month ago, so this recollection may take a while.

[As for the debugger not working, that was in the different microblazer build project. Like I said (possibly confusingly since I used the activity word 'programming' rather than the product word 'program' - sorry about that!) "the actual program[ming] worked fine", to answer your question.]

Now I'll reopen that BSD (nb not the xadc, which I never got around to retrying since attempting to update the BSD sources seemed so spectacularly unproductive) OOtB project (which I'd just abandoned) in viv2015.4, now, just to see what state it's left in (tho I note that vivado 2016.1 is now out - and keeping up with projects not appearing to be upward compatible sourcewise/IDEwise - that's another story!).

Looks like it's in a state where 'Run synthesis' might be the thing to do, so here goes.

(1) OK, synthesis seems green and uneventful (took quite a while though, with 538 warnings, which I'm ignoring) and I'm being encouraged to 'run implementation', so ...

(2) Hmm. Bit of an ambiguous result here. The "Implementation Completed" popup is all "Blue i Info" with Implementation successfully completed and a next to "Open Implemented design" BUT the bottom "design runs" panel is showing a small red exclamation mark with some WNS/TNS/WHS/THS figures in red an a Failed Timing! status. But I guess I'll OK the 'Open' anyway.

This is not at all what I remember from last time is all I can say at this point.

As things in red seem 'dangerous' to me, I'm unwilling to proceed, not that I'd know what the next step is anyway! The design opened ok but I'm not being invited to generate a bitstream or go any further. It's just sitting there, looking red.

bsdproject2015.4tclscriptlog.txt

bsdproject2015.3tclscriptlog.txt

[sLowe]

Hey lemoutan!

Sorry to hear about your frustrations. Could you maybe take a screenshot of these "critical errors" you are getting if you still have the project up? When I ran the project I got "critical warnings" that although may look bad and in other projects can point to large issues, these refer to problems that the design accounts for. The xadc demo lets the wizard initialize the IP so that the demo itself does not need to talk to the IP over the DRP interface. That is why those pins are not connected. Those critical warnings can most likely be eliminated if those ports are explicitly driven to 0. (The tools end up doing this anyway.) If the errors do stop bitstream generation that is a big problem and would love to see the errors you are getting. Do they look like the ones below?

• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[15]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[14]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[13]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[12]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[11]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[10]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[9]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[8]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[7]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[6]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[5]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[4]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[3]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[2]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[1]
• [Synth 8-4442] BlackBox module xadc has unconnected pin di_in[0]
• [Synth 8-4442] BlackBox module xadc has unconnected pin dwe_in
• [Synth 8-4442] BlackBox module xadc has unconnected pin reset_in
• [Synth 8-4442] BlackBox module xadc has unconnected pin vp_in
• [Synth 8-4442] BlackBox module xadc has unconnected pin vn_in

It is interesting that the debugger did not work for you in SDK. Were you able to just run the program on your board without debugging it?

It is awesome that you are hungry to play with the ARTY. The learning curve with the tools is pretty steep but as many will tell you the experience is very rewarding!

-Sam

[lemoutan]

Hi sLowe. Thanks for biting!

My complaint was that following the instructions supplied with the product got me nowhere - presumably because software or firmware updates since the instructions and (critically) the software were first committed to paper/website have not been correspondingly upgraded.

But since then (it was a month ago) I've found other routes. For example a couple of youtubings - one by Sarah Fagin (https://www.youtube.com/watch?v=aPDT0sPr4jE) which - despite being aimed at the zybo - got me going with a very simple VHDL. That worked a treat, but obviously it's nowhere near as complex as the OutOfTheBox artyistry. Another one (https://www.youtube.com/watch?v=gjGWAr5L9dg) involved creating a basis microblaze from scratch. That one worked most of the way, but the last couple of minutes used the debugger which - for some unknown reason - did not work at all for me. So despite looking promising it turned out another dead end (at least debuggingwise - the actual programming worked fine). Basically then, I can 'do vhdl' with an arty, but that's about it. It may be enough. I conclude, therefore, that Vivado seems to see the necessary artyness configgery quite satisfactorily.

I'd really like to complete (i.e. work through) that XADC demo though and - despite what you say about 'warnings about unconnected pins' - the errors are critical and it's most definitely not OK. I didn't simply see a few warnings (there were also many of those) and whimsically decide to refer to them here as 'critical errors' for the fun of it. They are show-stoppers and - again, being a newbie - I've not much of a clue what to do about them. I'm assuming anyone else taking the same route as I did will encounter the same difficulty. There's nothing to load onto the board because it doesn't get as far as generating a bitstream.

The web server demo (https://www.youtube.com/watch?v=NF7ryZH8lxE) looked really interesting but - again - there's nothing on xilinx's site corresponding to what is now looking like vapourware. Like an earlier poster said here, one's concern is that the license might expire before one gets to play with such stuff.

I very much appreciate your offer to provide an RTOSsy webserver. However, I cannot answer specific questions addressing your "if it is just the freeRTOS components of the web server that you want" because I don't know what I want yet. All I can really say is that it would be nice to be able to reach the board over the internet and get it to do stuff. As things stand, there seems to be no working material knocking about (at xilinx or digilent) to lead you through to that.

I'm just playing around and see the "I'd like to do this" stage as "stage two". My main point is that I expect the quick-start-for-newbies stuff (i.e. "stage one") to work, and it just doesn't. This makes it a very frustrating experience for those trying to learn!

Thanks for listening (if you have been)!

 

[sLowe]

Hey Lemoutan,

To see if your board files are actually installed correctly, make a new project then click next until you are asked to specify the part. You should be able to click the boards tab and see the ARTY in the list. 

Next is addressing the critical errors. These should just be warnings about unconnected pins to the XADC IP. This is ok since the design does not need them. 

The dialog you are getting is expected because the export hardware option is used for Microblaze designs. The XADC demo is purely a digital logic demo and does not utilize the Microblaze core. To load this onto your board, open the hardware manager found under Program and Debug then open target. After your computer connects to your board, you can click program to load the demo onto the board.

I haven't heard anything new about the web server demo but if it is just the freeRTOS components of the web server that you want, it is not too hard to get a simple RTOS project going in Vivado. You can respond to this and I can make a little reference design for the resource center.

Hope this helps!

-Sam

 

[lemoutan]

I, too, just got an arty board and followed the instructions - including the prerequisite of introducing digilent's board files into (in my case) the folder C:\Software\Xilinx\Vivado\2015.4\data\boards\board_files\arty (amongst several sibling folders for other boards) from the Digilent\vivado-boards-master\new\board_files folder in the github zip. I started with the Arty-master\Projects\XADC_Demo project, using the create_project.tcl script as instructed, and got as far as unearthing 20 critical warnings and 17 non-critical ones. Attempts to export the hardware with bitstream to the SDK simply resulted in a dialog which effectively ends any progress. What am I doing wrong?

In addition, where's the web-server project promised in a well-known youtube video from last year? I know it's xilinx's promise, and not digilent's, but even so.

[JColvin]

Hi ColoradoAnalog,

Thanks for posting what you found! I'll make sure the demo project page gets updated appropriately.

Thanks,
JColvin

[ColoradoAnalog]

I'll put this here just in case anyone else searches for this. I had to change the port number to get it to work. I found out what the port number was by looking (in Windows 7) at Control Panel > Hardware and Sound > Devices and Printers > Unspecified > Digilent USB Device, then right click and select Properties, then go to the Hardware tab. Here it shows that it is using COM7. After I changed the port number to 7 and reprogramming the FPGA the UART communication worked.