Damage to PMOD JB

[Kyle Hagen]

Hello all,

I'm having an issue with all of the digital IO on PMOD port JB.

When we build a simple design that connects a constant value generator to an 8-wide output port, and use the Zybo xdc file to connect the PMOD outputs to the generator, we get no output on any of the JB logic pins. JC, JD, JE all behave as expected with their pins reading 3.3V.

Is it possible to damage only those pins? Since they belong to the IO Bank 34 along with pins that we can show work, it seems strange that they would all fail together, but other pins on the IO bank wouldnt.

Perhaps someone that knows more about the board outputs could lend some insights.

Thanks in advance for your time

Kyle

[Kyle Hagen]

7 minutes ago, Kyle Hagen said:

Ugh...I think I was using the old Zybo xdc files..

 

Going to try with the Z7-20 version and see if this fixes it

brb

Yeah, using the correct xdc file did the trick. Humbled once again.

 

Thanks for the promt support, Jon. It's greatly appreciated.

 

/kyle

[jpeyron]

Hi @Kyle Hagen,

Welcome to the Digilent Forums!

What are you doing to test the Pmod Port JB, JC, JD, JE?

Please attach a screen shot of your block design, wrapper and xdc.

Is the Zybo hot to the touch when turned on?

Since the Pmod Port B on the Zybo here is a high speed pmod port there are no protection resistors as described in the reference manual here on page 26. I have seen unexpected behavior when the high speed ports have been given out of spec voltage.  Here is a xilinx thread of a similar situation where only part of the bank is not working. 

best regards,

Jon

[Kyle Hagen]

49 minutes ago, jpeyron said:

Hi @Kyle Hagen,

Welcome to the Digilent Forums!

What are you doing to test the Pmod Port JB, JC, JD, JE?

Please attach a screen shot of your block design, wrapper and xdc.

Is the Zybo hot to the touch when turned on?

Since the Pmod Port B on the Zybo here is a high speed pmod port there are no protection resistors as described in the reference manual here on page 26. I have seen unexpected behavior when the high speed ports have been given out of spec voltage.  Here is a xilinx thread of a similar situation where only part of the bank is not working. 

best regards,

Jon

Hi Jon, thanks for the response.

 

To test, I am using an oscilloscope to measure the voltage on the PMOD data pins. The probe is grounded to a GND via.

JC,D,E show 3.3 V on all data pins
JB all data pins are at around 36 mV

EDIT: The constant IP blocks are all set to width 8, value 15

 

[jpeyron]

Hi @Kyle Hagen,

Could you try just testing Pmod Port JB.

Having all of the digital I/O pins on 4 of the Pmod ports set to 1 you might be exceeding the 200 ma bank limit as discussed on page 4(note #10) of the  Zynq-7000 All Programmable SoC (XC7Z030, XC7Z045, and XC7Z100): DC and AC Switching Characteristics.

best regards,

Jon

[Kyle Hagen]

15 minutes ago, jpeyron said:

Hi @Kyle Hagen,

Could you try just testing Pmod Port JB.

Having all of the digital I/O pins on 4 of the Pmod ports set to 1 you might be exceeding the 200 ma bank limit as discussed on page 4(note #10) of the  Zynq-7000 All Programmable SoC (XC7Z030, XC7Z045, and XC7Z100): DC and AC Switching Characteristics.

best regards,

Jon

Hi again Jon.

I started by testing each Pmod connector individually with a single constant IP block, leaving the other Pmod ports commented out in the xdc file. The results were the same. There are no circuits attached to the Pmod connectors and I suspect no current flow.

Also to answer your previous question (sorry), the Zynq does not feel abnormally warm.

 

Im a bit curious about the difference between the JB port and the others... The Zybo Z7-10 does not populate this port, while the Z7-20 (which we have here) does... could that be part of what we're seeing here?

 

Edit: typo

[Kyle Hagen]

Ugh...I think I was using the old Zybo xdc files..

 

Going to try with the Z7-20 version and see if this fixes it

brb

[jpeyron]

Hi @Kyle Hagen,

I would guess that is the issue. 

best regards,

Jon