AXI DMA and memory management

[TomF]

Hello,

I have implemented a design with microblaze and a AXI DMA connected to it. When using the address editor it is clear, that the DMA needs to have the access to the same address range as the mig_7 in order to write data to the RAM.

When I use the DMA together with a microblaze program, who takes care of memory access violations? When I use a bootloader to load the program into RAM, there should be some space reserved, but this is something that happens before the microblaze code is executed. When I assign/allocate some memory for variables in the microblaze code, the processor should take care of violations I guess.

But how does this look for data written by the DMA? How can I make sure that the memory in this address space is unused and how can I allocate it?

 

Best regards

[jpeyron]

Hi @TomF,

I would suggest looking at the driver examples and documentation here: C:\Xilinx\SDK\2019.1\data\embeddedsw\XilinxProcessorIPLib\drivers\axidma_v9_9. 

best regards,

Jon

[TomF]

Thank you @jpeyron,

the driver is quite clear to me, but if included I must have missed the part where address space gets reserved in a way that it does not collide with the application memory.

If there is somememory allocated by the microcontroller for some function and I assign this space to the DMA accidentally, data will be overwritten and the code will behave unintendedly. How can I be sure to use a free memory space?

 

Best regards

[jpeyron]

Hi @TomF,

I have reached out to our content team to see if they have any input for you. I would also suggest reaching out to Xilinx support about your question as well. 

best regards,

Jon

[jpeyron]

Hi @TomF,

The content team did respond with some initial thoughts :

1. The DMA control register space is not the memory space used for transfers.
2. There may be some built in protections, but users should still be careful about what memory they point the DMA to.
3. The user could try to use some form of built in memory management if possible (arrays, malloc, etc).

best regards,

Jon

[TomF]

Thank you for your answer, @jpeyron

I think I get an idea how it is organized, but it still doesn't satisfy me completely. Concerning your points I have some thoughts:

1. The control register space is always different from the MIG memory, isn't it synthesized as a real register in the AXI peripheral?

2. The only way I see to prevent the DMA from pointing to MIG memory that is used by the application (to my current knowledge quasi-random), so I would need to restrict it in the address editor or by assigning a "safe" address in my microblaze code.

3. I understand this by malloc'ing space for an array, assigning this pointer address to the DMA. Is this correct? Seems to be a clean solution.

 

Best regards

 

[jpeyron]

Hi @TomF,

Our content team had some bandwidth to review your response and responded:

2. I'm not sure how to go about doing the Address Editor restriction, if possible. Selecting a safe address is what is done in Xilinx example code (typically via a MEM_BASE_ADDRESS macro, I think). I believe this just needs to be higher than any address appearing in the linker script.

3. I haven't worked with the DMA to know if there are any caveats to the malloc solution, but it is the one I prefer at the moment.

best regards,

Jon