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Building the perfect AXI slave


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I've had the opportunity recently to build and verify several AXI cores, not just the AXI-lite cores but also the full AXI slave cores.  I have also been both tweeting and blogging about what I've found.  This includes not only all of the bugs I found within Xilinx's demonstration AXI slave, but also how to build an AXI slave that actually follows the AXI protocol and gets a much higher throughput.

Feel free to check these articles out on ZipCPU.com.


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