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Tera Term displays [ brackets continuously with Zybo 7z020


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I am trying to learn about Zynq APSoC using Zybo 7z020.

I have successfully completed all steps of this tutorial :https://reference.digilentinc.com/vivado/getting-started-with-ipi/2018.2

I have a problem that Tera Term is always printing square brackets instead of the expected output as shown in this tutorial.

I am using Vivado 2018.3 with SDK 2018.3 on Window 10.

Below is the screen snapshot of the problem. Could anybody please help.



Thank you very much


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