Ethernet Packet recieving

[Aamirnagra]

I am working on ethernet communication with Nexys 4 (i.e. Artix 7) . I have perfectly tested Eth_tx and can also see data on wire-shark. I am not able to monitor data receiving from PC to FPGA board.

Any help in this regard will be highly appreciated .  

[jpeyron]

Hi @Aamirnagra,

If you haven't tried the echo server this project uses both the ethernet rx and tx of the Nexys 4.  Another option would be to have the data displayed on the LED or through the usb uart bridge and viewed on a serial terminal emulator.  The last thing you could use an o-scope or R129 - R132 shown on page 5 of the schematic here and you should be able to see if data is being moved through rx_p, rx_n and tx_p and tx_n.

thank you,

Jon

[Aamirnagra]

jpeyron I dont want to involve Microblaze. The Ethernet Tx engine is purely designed in Verilog. So is there anyway to store receive packet from other FPGA board without using Microblaze Processor. 

[zygot]

Look around this Digilent's site for information for clues on how to do what you want to do. There have been a few responses to related questions on the FPGA forum.