jaggu Posted December 6, 2018 Share Posted December 6, 2018 We want to convert MATLAB code for image low pass filter to verilog. But in workflow advisor in hdl code generation it is showing following error. Can any one help me Link to comment Share on other sites More sharing options...
jpeyron Posted December 6, 2018 Share Posted December 6, 2018 Hi @jaggu, Unfortunately, We here at digilent do not have MATLAB experience with FPGA's nor do we have MATLAB. Hopefully one of the more experienced community members will have some input for you. I would also suggest reaching out to MATLAB and Xilinx support about your question. thank you, Jon Link to comment Share on other sites More sharing options...
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jaggu
We want to convert MATLAB code for image low pass filter to verilog. But in workflow advisor in hdl code generation it is showing following error. Can any one help me
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