I’m interested in possible use of the JTAG HS2 debugger for use as a firmware debugger for ARC processor code running on a HAPS 80 FPGA platform for our design team. Can you answer the following questions:
Does the HS2 work with the Synopsys HAPS FPGA platform?
Does the HS2 work with ARC processors, specifically the EM and HSx series?
Does the HS2 utilize MetaWare for the debugging software or is there special software tools for working with the platform that we have? What Is the Adept 2 and Adept SDK used for?
Is there information available regarding the JTAG firmware debug environment for the HS2?
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Dennis Jow
I’m interested in possible use of the JTAG HS2 debugger for use as a firmware debugger for ARC processor code running on a HAPS 80 FPGA platform for our design team. Can you answer the following questions:
Does the HS2 work with the Synopsys HAPS FPGA platform?
Does the HS2 work with ARC processors, specifically the EM and HSx series?
Does the HS2 utilize MetaWare for the debugging software or is there special software tools for working with the platform that we have? What Is the Adept 2 and Adept SDK used for?
Is there information available regarding the JTAG firmware debug environment for the HS2?
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