Does PmodOLEDrgb work on MicroZed board?

[irisphys]

Hi there,

Does the PmodOLEDrgb work on the MicroZed board? Here is the link to the product.

Thanks.

[jpeyron]

Hi @irisphys,

The product guide for the microzed here says that it has a 2x6 Digilent Pmod® compatible interface providing 8 PS MIO connections for user I/O. So it should work with the PmodOLEDrgb.

thank you,

Jon

[irisphys]

On 7/18/2018 at 6:00 PM, jpeyron said:

Hi @irisphys,

The product guide for the microzed here says that it has a 2x6 Digilent Pmod® compatible interface providing 8 PS MIO connections for user I/O. So it should work with the PmodOLEDrgb.

thank you,

Jon

Thank you very much, Jon. Digilent has a tutorial article called 'The Getting Started with Digilent Pmod IPs' Here In the Overview session, the article lists the Platforms Supported. I didn't see MicroZed lists there. That is why I got confused...

I did try to use this tutorial, which is for ZYBO, on MicroZed. It has not worked yet.

Do you still think the PmodOLEDrgb will work on the MicroZed board?

Thanks again.

[jpeyron]

Hi @irisphys,

We do not have documentation specifically for Avnet's Microzed dev board. Since we did not make a board file for the Microzed you should follow most but not all of the ZYNQ platform part of the The Getting Started with Digilent Pmod IPs tutorial. The PmodOLEDrgb IP Core should work with the microzed board. Once you have added the ip core you will right click on the pmod out and select make external. After creating a wrapper you will need to use an xdc file to constrain the pins named in the wrapper. What version of Vivado are you using?

cheers,

Jon 

[irisphys]

On 7/20/2018 at 2:18 PM, jpeyron said:

Hi @irisphys,

We do not have documentation specifically for Avnet's Microzed dev board. Since we did not make a board file for the Microzed you should follow most but not all of the ZYNQ platform part of the The Getting Started with Digilent Pmod IPs tutorial. The PmodOLEDrgb IP Core should work with the microzed board. Once you have added the ip core you will right click on the pmod out and select make external. After creating a wrapper you will need to use an xdc file to constrain the pins named in the wrapper. What version of Vivado are you using?

cheers,

Jon 

Hi Jon,

I updated my Vivado to be the newest one, 2018.2. The vivado-library I am using is 2016.4-1 because that is the newest version I could find on Digilent. Please see the pdf file in the attachment for the block design I created for Pmodoledrgb. I got an Error saying

[BD 41-1811] The interconnect </ps7_0_axi_periph> is missing a valid slave interface connection.

Does it mean that I need to connect SOO_AXI in AXI Interconnect to something?

By the way, I enabled the SPI1 MIO in Zynq device, then changed it to target the MIO Pins 10-15(PS PMOD Pins) after reading this thread . Don't know whether it was necessary or not.

Thank you very much, Jon.

design_1.pdf

[jpeyron]

Hi @irisphys,

You should not be using the mio pins. What frequency are you giving the ext_spi_clk on the PmodOLEDrgb?  Did you attach the full vivado library? both the ip and if folders to the vivado project? Please attach your wrapper and the xdc file. Also what is the microzeds fpga part number?

thank you,

Jon

[irisphys]

8 minutes ago, jpeyron said:

Hi @irisphys,

You should not be using the mio pins. What frequency are you giving the ext_spi_clk on the PmodOLEDrgb?  Did you attach the full vivado library? both the ip and if folders to the vivado project? Please attach your wrapper and the xdc file. Also what is the microzeds fpga part number?

thank you,

Jon

Hi Jon,

Thanks for replying.

The ex_spi_clik is connected to FCLK_CLK1(100MHz) on ZYNQ7 Processing System. The fpga part number is XC7Z010.  I think I added a full vivado library to the IP repository. I couldn't generate a wapper file due to the earlier error:(

Here is the xdc file.

Thanks again

 

[jpeyron]

Hi @

The full part number for the microzed you have is XC7Z010-1CLG400C. After looking at the schematic for the mircozed you might need to make adjustment with the mio pins. I have not worked with the microzed board. With that in mind I would suggest to reach out to Avnet support about the configuration of the zynq processor. The ext_spi_clk on the PmodOLEDrgb should be 50 MHz.  I am able to create a wrapper but I havent been able to generate a bitstream for the microzed with the PmodOLEDrgb. I have attached what i believe the xdc should be based on the schematic and the wrapper.

thank you,

Jon

microzed.xdc

[irisphys]

On 7/23/2018 at 5:59 PM, jpeyron said:

Hi @

The full part number for the microzed you have is XC7Z010-1CLG400C. After looking at the schematic for the mircozed you might need to make adjustment with the mio pins. I have not worked with the microzed board. With that in mind I would suggest to reach out to Avnet support about the configuration of the zynq processor. The ext_spi_clk on the PmodOLEDrgb should be 50 MHz.  I am able to create a wrapper but I havent been able to generate a bitstream for the microzed with the PmodOLEDrgb. I have attached what i believe the xdc should be based on the schematic and the wrapper.

thank you,

Jon

microzed.xdc

Hi Jon,

The Pmod on MicroZed board is only connected to the PS. I want to use the PS SPI controller to control the PmodOLEDrgb . I modified the MIO to connect to the Pmod as I mentioned earlier. I found a tutorial for how to use the PS SPI controller to control MAX31855 PMOD and I was able to talk to the OLEDrgb in some way. Only terminal data without images.

Do I still need to drop the PmodOLEDrgb_v1.0 IP if I want to use the PS SPI controller? Pmod is not connected to the PL on MicroZed.

Thank you.

06_MZPZ_PS_SPI_PMOD_2016_4_01.pdf

[jpeyron]

Hi @irisphys,

I reached out to our content team about this thread and they believe the MIO SPI has a different set of drivers to the AXI Quad SPI. You'll need to swap out the drivers in the PmodOLEDrgb IP Core to get it working. The functions in each set of drivers should be roughly equivalent.

thank you,

Jon

 

 

[irisphys]

Hi Jon,

Just want to share my progress...

1) I don't know how to swap out the AXI Quad SPI driver (PL-PS) with a PS SPI driver in the PmodOLEDrgb IP core. But I found a thread regarding PmodOLEDrgb with Zedboard for my reference. Do you have a PmodOLEDrgb IP core for the PS SPI? For MicroZed, it will be especially useful because MicroZed's Pmod only connects to the PS.

2) In order to use the PmodOLEDrgb IP core with AXI Quad SPI driver, I am using a microzed io carrier card. I was be able to create the bitstream, program the FPGA, and to launch on the hardware without errors. But I got no output on the OLEDrgb screen. Here is the documentation for the Microzed board. Here is the documentation for the microzed io carrier card. I guess it is a pin assignment problem. I am still trying...

Thank you very much, Jon.

-Iris

 

 

[jpeyron]

Hi @irisphys,

Are you holding the CS low? I would suggest to contact Avnet support here. Avnet has experience with the Microzed and the MIO Pmod port.

thank you,

Jon

[irisphys]

On 8/3/2018 at 3:14 PM, jpeyron said:

Hi @irisphys,

Are you holding the CS low? I would suggest to contact Avnet support here. Avnet has experience with the Microzed and the MIO Pmod port.

thank you,

Jon

Hi Jon,

Just want to give you an update. I got it working using the PL AXI Quad SPI controller after I fixed my IO constraints. And I did contact the Avnet support you mentioned above. Here is the thread if you are interested.

Again thank you very much for your help on my project.

-Iris

[jpeyron]

Hi @irisphys,

Glad to hear you were able to get the microzed and pmodOLEDrgb working together.

thank you,

Jon