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Reset signal at device startup.


chasep255

Question

I have the basys 3 board with the artix 7 fpga.  I am wondering where exactly the system wide reset comes from?  By this I mean a signal that is sent when the device starts up to initialize all of the registers.  Is it supposed to be something in the XDC file because I can not find it.

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Hi chasep255,

Are you referring to how you can load a program onto the Basys 3 and have it run, but when you disconnect the FPGA from a power source and then power it on later it loses the program? If so, this is because by default the program is loaded into volatile memory which will lose whatever it has stored on it when it is disconnected from a power source; you can get around this by storing the program on the flash memory which will not lose the program.

Does that answer your question or did I happen to completely misinterpret it?

Thanks,
JColvin

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